Patents by Inventor Takahiro NAGASAWA

Takahiro NAGASAWA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955390
    Abstract: A semiconductor wafer evaluation method includes acquiring a reflection image as a bright-field image by receiving reflected light which is obtained when irradiating one surface side of a semiconductor wafer to be evaluated with light; acquiring a scattered image as a dark-field image by receiving scattered light which is obtained when irradiating the surface side of the semiconductor wafer with light; and obtaining a distance between a bright zone that is observed in the reflection image and a bright zone that is observed in the scattered image. The semiconductor wafer to be evaluated is a semiconductor wafer in which a chamfered surface is formed in a wafer outer peripheral edge section, and the method includes evaluating a shape of a boundary part between a main surface on the surface side irradiated with the light of the semiconductor wafer to be evaluated and a chamfered surface adjacent to the main surface.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: April 9, 2024
    Assignee: SUMCO CORPORATION
    Inventors: Takahiro Nagasawa, Yasuyuki Hashimoto, Hirotaka Kato
  • Publication number: 20220373478
    Abstract: The method includes detecting a COP in a surface of a reference wafer with a laser surface inspection apparatus to be calibrated and an apparatus for calibration that obtains an X coordinate position and a Y coordinate position of the COP; determining a COP that is detected as the same COP with a determination criterion that a positional difference between a detected position obtained by the laser surface inspection apparatus to be calibrated and a detected position obtained by the apparatus for calibration on the reference wafer surface is within a threshold range; and calibrating the coordinate position identification accuracy of the laser surface inspection apparatus to be calibrated by adopting the X and Y coordinate positions obtained by the apparatus for calibration as true values of the X and Y coordinate positions.
    Type: Application
    Filed: October 6, 2020
    Publication date: November 24, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Keiichiro MORI, Takahiro NAGASAWA
  • Publication number: 20220102225
    Abstract: Provided is an evaluation method of a semiconductor wafer having a polished surface, the method including a cleaning process of cleaning the semiconductor wafer with one or more kinds of cleaning liquid, measuring an LPD of the polished surface both before and after the cleaning process with a laser surface inspection device, and distinguishing the type of defect or foreign substance measured as the LPD, based on measurement results obtained in the measuring, according to distinguishing standards shown in Table A.
    Type: Application
    Filed: November 11, 2019
    Publication date: March 31, 2022
    Applicant: SUMCO CORPORATION
    Inventors: Takahiro NAGASAWA, Masahiro MURAKAMI
  • Publication number: 20200411391
    Abstract: A semiconductor wafer evaluation method includes acquiring a reflection image as a bright-field image by receiving reflected light which is obtained when irradiating one surface side of a semiconductor wafer to be evaluated with light; acquiring a scattered image as a dark-field image by receiving scattered light which is obtained when irradiating the surface side of the semiconductor wafer with light; and obtaining a distance between a bright zone that is observed in the reflection image and a bright zone that is observed in the scattered image. The semiconductor wafer to be evaluated is a semiconductor wafer in which a chamfered surface is formed in a wafer outer peripheral edge section, and the method includes evaluating a shape of a boundary part between a main surface on the surface side irradiated with the light of the semiconductor wafer to be evaluated and a chamfered surface adjacent to the main surface.
    Type: Application
    Filed: January 7, 2019
    Publication date: December 31, 2020
    Applicant: SUMCO CORPORATION
    Inventors: Takahiro NAGASAWA, Yasuyuki HASHIMOTO, Hirotaka KATO
  • Patent number: 10261125
    Abstract: The method of setting the evaluation standard of a semiconductor wafer includes setting the A and B on the basis of an abnormal substances overlooking rate “a” specific to the light-scattering type surface inspection apparatus specified by an apparatus-induced abnormal substances overlooking rate ? due to the light-scattering type surface inspection apparatus and a probabilistic abnormal substances overlooking rate, in which A is the number of times of inspection, B is an abnormal substances detection threshold, the apparatus-induced abnormal substances overlooking rate ? is higher as the target abnormal substances size to be detected is smaller, and the probabilistic abnormal substances overlooking rate is lower as the number of times of inspection increases.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: April 16, 2019
    Assignee: SUMCO CORPORATION
    Inventors: Takahiro Nagasawa, Keiichi Takanashi
  • Publication number: 20180136279
    Abstract: The method of setting the evaluation standard of a semiconductor wafer includes setting the A and B on the basis of an abnormal substances overlooking rate “a” specific to the light-scattering type surface inspection apparatus specified by an apparatus-induced abnormal substances overlooking rate ? due to the light-scattering type surface inspection apparatus and a probabilistic abnormal substances overlooking rate, in which A is the number of times of inspection, B is an abnormal substances detection threshold, the apparatus-induced abnormal substances overlooking rate ? is higher as the target abnormal substances size to be detected is smaller, and the probabilistic abnormal substances overlooking rate is lower as the number of times of inspection increases.
    Type: Application
    Filed: November 13, 2017
    Publication date: May 17, 2018
    Applicant: SUMCO CORPORATION
    Inventors: Takahiro NAGASAWA, Keiichi TAKANASHI