Abstract: A constant-velocity universal joint includes an outer joint member; an inner joint member arranged in an inside of the outer joint member; and torque transmitting members. At least one of the outer joint member and the inner joint member comprises track grooves that are engaged with rolling surfaces of the torque transmitting members. At least one of the components of the constant-velocity universal joint is formed of a metal sintered compact. The metal sintered compact has a relative density of 80% or more and less than 100%. The metal sintered compact comprises a hardened layer formed on a surface thereof through heat treatment. Among the components each formed of the metal sintered compact, a component having a ring shape is subjected to a cold rolling process.

Abstract: A cage is made of a magnesium alloy such as AZ91D, and is molded by means of injection molding. In this cage, a confluence region is brought away to outside the cage during the injection molding. The confluence region is a region including a void formed by merging of flows of the magnesium alloy. When observing a cross sectional surface of the cage, a ratio of an ? phase having a grain size of 20 ?m or greater is less than 15% in the magnesium alloy constituting the cage.

Abstract: A power transmission part is made of a sintered material obtained by press molding and firing granulated powder obtained by granulating raw material powder having iron as a main component. The sintered material can thereby be increased in density by a powder press sintering method. A power transmission part of high strength and high rigidity can thereby be obtained.

Abstract: A semiconductor device includes a semiconductor substrate, a surface electrode formed on the semiconductor substrate, an ineffective region formed to surround the surface electrode, and an ID-indicating portion made of a different material than the surface electrode and formed on the surface electrode to indicate an ID. The area of the ineffective region is smaller than the area of the surface electrode.

Abstract: A semiconductor device includes a substrate of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a collector region of the second conductivity type, a trench gate, which is formed in a trench via a gate insulation film, an electrically conductive layer, which is formed within a contact trench that is formed through the source region, a source electrode, which is in contact with the electrically conductive layer and the source region, and a latch-up suppression region of the second conductivity type, which is formed within the base region, in contact with the electrically conductive layer, and higher in impurity concentration than the base region. The distance between the gate insulation film and the latch-up suppression region is not less than the maximum width of a depletion layer that is formed in the base layer by the trench gate.

Abstract: A semiconductor device includes a substrate of a first conductivity type, a base region of a second conductivity type, a source region of the first conductivity type, a collector region of the second conductivity type, a trench gate, which is formed in a trench via a gate insulation film, an electrically conductive layer, which is formed within a contact trench that is formed through the source region, a source electrode, which is in contact with the electrically conductive layer and the source region, and a latch-up suppression region of the second conductivity type, which is formed within the base region, in contact with the electrically conductive layer, and higher in impurity concentration than the base region. The distance between the gate insulation film and the latch-up suppression region is not less than the maximum width of a depletion layer that is formed in the base layer by the trench gate.

Abstract: An injection enhanced gate transistor includes a drift layer, a collector layer and a base layer divided into main cell regions and dummy cell regions by a plurality of trenches formed to extend from the top surface of the base layer into the drift layer. The main cell has a first emitter layer selectively formed in the surface layer of the base layer, gate electrodes formed in the trenches, and an emitter electrode located over the base layer. The dummy cell has a second emitter layer selectively formed so as to be scattered in the surface layer of the base layer and have a surface area smaller than that of the first emitter layer to prevent waveform vibration associate with negative gate capacitance.

Abstract: A semiconductor device includes: a drift layer of a first conductivity type; a collector layer of a second conductivity type located on the drift layer; a collector electrode located on the collector layer; a base layer of the second conductivity type located in a region isolated from the collector layer on the drift layer; a plurality of trenches formed at certain intervals to extend from the top surface of the base layer into the drift layer and thereby divide the base layer to main cell regions and dummy cell regions; a first emitter layer of the first conductivity type selectively formed in the surface layer of the base layer in each main cell region to extend along adjacent one of the trenches; gate electrodes formed in the trenches sandwiching each main cell region among said plurality of trenches via a gate insulating film; an emitter electrode located over the base layer and the first emitter layer in each main cell region; and a second emitter layer of the first conductivity type selectively formed s