Abstract: Disclosed is an multi-layered SOI substrate, which includes a supporting substrate, and a first insulator, a semiconductor film, a second insulator and a single crystalline semiconductor film (SOI film) which are layered on the main surface of the supporting substrate. The SOI substrate is formed by a direct bonding technique, and a bipolar transistor and an MOS transistor are formed using the single crystalline semiconductor film (SOI layer). The extremely shallow junction can be formed without epitaxial growth, thereby significantly increasing the operation speed of the semiconductor device at a low cost.

Abstract: Disclosed is an multi-layered SOI substrate, which includes a supporting substrate, and a first insulator, a semiconductor film, a second insulator and a single crystalline semiconductor film (SOI film) which are layered on the main surface of the supporting substrate The SOI substrate is formed by a direct bonding technique, and a bipolar transistor and an MOS transistor are formed using the single crystalline semiconductor film (SOI layer). The extremely shallow junction can be formed without epitaxial growth, thereby significantly increasing the operation speed of the semiconductor device at a low cost.

Abstract: A self-aligned bipolar transistor which has a small base resistance and small emitter-base and collector-base capacitances and is operable at high speed is disclosed. This bipolar transistor is characterized in that a low concentration collector region made of single crystal Si--Ge is self-alignedly formed between an intrinsic base of single crystal Si--Ge and an intrinsic base, and that an extrinsic base electrode and an intrinsic base are connected only through a doped external base. With this arrangement, an energy barrier is not established at the collector base interface owing to the formation of the low concentration region of single crystal Si--Ge, so that the transit time of the carriers charged from the emitter is shortened. The connection between the intrinsic base and the extrinsic base electrode via the doped external base results in the reduction of the base resistance.

Abstract: A hetero-junction bipolar transistor having an emitter composed of a semiconductor having a wider forbidden band width than that of a semiconductor constituting a base is disclosed. In the transistor, the emitter and the electrode leader area composed of a single crystalline semiconductor are provided being extended from the upper part of the emitter to the surface of the base through an insulating layer, for the purpose of making it possible to miniaturize the transistor and to operate the transistor at a high-speed by decreasing the emitter resistance.

Abstract: Disclosed is an multi-layered SOI substrate, which includes a supporting substrate, and a first insulator, a semiconductor film, a second insulator and a single crystalline semiconductor film (SOI film) which are layered on the main surface of the supporting substrate. The SOI substrate is formed by a direct bonding technique, and a bipolar transistor and an MOS transistor are formed using the single crystalline semiconductor film (SOI layer). The extremely shallow junction can be formed without epitaxial growth, thereby significantly increasing the operation speed of the semiconductor device at a low cost.

Abstract: A transistor is formed on a bonded SOI substrate. A collector electrode is connected to the peripheral sides of the collector areas on the insulator. A first insulator of isolation is formed on the peripheral side of the collector electrode. A base electrode is connected to a base area on the first insulator of isolation. Second insulators of isolation are formed on the peripheral side of a base electrode, and emitter electrode is connected to an emitter area by the second insulators of isolation. The connections between the collector electrode and the collector areas, between the base electrode and the base area, and between the emitter electrode and the emitter area are made under the emitter electrode, so the occupation area is small.

Abstract: A semiconductor device has an electrically insulating substrate and a semiconductor layer formed on the insulating substrate. A plurality of semiconductor regions are defined so as to be joined to each other to form at least two homojunctions in the semiconductor layer. A lead conductor for one of the semiconductor regions which is required to have a small thickness has a specific structure such that the lead conductor is in contact with the one semiconductor region at the main surface of the semiconductor layer for electrical connection therebetween and extends over that portion of the semiconductor layer which contributes to definition of at least one of the semiconductor regions other than the first-mentioned one semiconductor region.

Abstract: An impurity diffusion method which can control a surface atomic concentration from a low to a high surface atomic concentration with a good uniformity is provided. Natural oxide is removed from the surface of a semiconductor substrate with a deoxidizing atmosphere gas as a diffusion atmosphere gas in advance, and then an impurity gas is passed thereto, while passing the deoxidizing atmosphere gas thereto, thereby conducting the diffusion. Flow rate or concentration of impurity of the impurity gas is so set that the impurity atomic concentration of the diffusion layer can be controlled by the flow rate or the concentration of impurity of the impurity gas. The impurity atomic concentration of the diffusion layer can be controlled by adjusting the flow rate or concentration of impurity of the impurity gas, and a diffusion layer having a low impurity atomic concentration can be formed. A shallow junction having a depth of not more than 50 nm can be formed.

Abstract: A first region of a first conductivity type is formed in the surface of a semiconductor body, and second and third regions of a second conductivity type are formed on and under, respectively, of the first region. An electrode region formed on a first insulating film formed on the semiconductor body is connected electrically to the first region. The electrode region is defined as having an elongated first part an upper surface of which is connected to an electrode, and having a second, different part which has a substantially constant width and which width is substantially equal to the thickness of the first portion of the electrode region. A metal silicide film is formed over the upper surface of the first portion of the electrode region. The first, second and third regions can be base, emitter and collector regions, respectively, of a bipolar transistor formed in an island region of an epitaxially grown layer on a semiconductor substrate.

Abstract: A vertical bipolar transistor arrangement in which the distance between the emitter and the isolation region is kept within a range determined by the sum of emitter depth and base width (i.e., the thickness of the base in the depth direction). This keeps the carriers given by the emitter from getting trapped inside, thereby preventing the cut-off frequency from dropping.

Abstract: A bipolar SRAM which includes a forward bipolar transistor and a reverse bipolar transistor on an identical semiconductor substrate, is disclosed. Concretely, the base region of the reverse bipolar transistor is formed at a deeper position of the substrate than the base region of the forward bipolar transistor, thereby to heighten the cutoff frequency f.sub.T of the reverse bipolar transistor.

Abstract: A vertical bipolar transistor arrangement in which the distance between the emitter and the isolation region is kept within a range determined by the sum of emitter depth and base width (i.e., the thickness of the base in the depth direction). This keeps the carriers given by the emitter from getting trapped inside, thereby preventing the cut-off frequency from dropping.

Abstract: A semiconductor device is disclosed, which includes bipolar transistor each having an emitter, base and collector formed inside each protruding portion of a semiconductor substrate, and trenches for device isolation. The bipolar transistor and the trench are spaced apart from each other by a predetermined spacing. According to this arrangement, the width of a base contact becomes uniform and any change of transistor characteristics can be prevented effectively.