Patents by Inventor Takahiro Yamamoto

Takahiro Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9502939
    Abstract: A method for manufacturing a stator configured to ensure insulation properties between a conductor and an armature core while preventing a manufacturing cost from increasing and preventing a space factor from lowering. In an edge-removing step, a plurality of independent edge-removing punches, which correspond to one slot S or two or more slots S, press and chamfer a corner portion of an axial opening edge of the slot in an axial end core sheet of the armature core.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 22, 2016
    Assignees: ASMO CO., LTD., DENSO CORPORATION
    Inventors: Yoshimasa Kinpara, Takahiro Yamamoto, Jirou Hayashi, Asuka Tanaka
  • Publication number: 20160328185
    Abstract: A print job is submitted from a client terminal 100 to two print servers 200?1, 200?2, a print server taking main charge 200?1 instructs a printer 300 to print one page at a time in sequence, and status information indicating the printing state is shared by the two print servers 200?1, 200?2. If a failure occurs in the print server taking main charge 200?1, then, on the basis of the status information shared by the two print servers 200?1, 200?2, a print server taking sub charge 200?2 instructs the printer 300 to print in accordance with the submitted print job from the unprinted page. This makes it possible to immediately continue the print from the page indicated to be completely printed when the failure occurred.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Takahiro YAMAMOTO, Masatoshi Tanaka, Ko Shimazawa, Takahiro Sakimoto
  • Publication number: 20160328192
    Abstract: A print job is submitted from a client terminal 100 to two print servers 200-1, 200-2, a print server taking main charge 200-1 instructs a printer 300 to print one page at a time in sequence, and status information indicating the printing state is shared by the two print servers 200-1, 200-2. If a failure occurs in the print server taking main charge 200-1, then, on the basis of the status information shared by the two print servers 200-1, 200-2, a print server taking sub charge 200-2 instructs the printer 300 to print in accordance with the submitted print job from the unprinted page. This makes it possible to immediately continue the print from the page indicated to be completely printed when the failure occurred.
    Type: Application
    Filed: July 22, 2016
    Publication date: November 10, 2016
    Inventors: Takahiro YAMAMOTO, Masatoshi Tanaka, Ko Shimazawa, Takahiro Sakimoto
  • Patent number: 9478418
    Abstract: A method of manufacturing a semiconductor element includes a first step of epitaxially growing an AlN layer on a substrate, a second step of forming a buffer layer on the AlN layer by epitaxially growing AlxGayInzN where x, y, and z satisfy x+y+z=1 and y is not zero without adding Fe, a third step of forming a resistance layer on the buffer layer by epitaxially growing AlxGayInzN where x, y, and z satisfy x+y+z=1 and y is not zero while adding Fe, a step of epitaxially growing a channel layer on the resistance layer, a step of epitaxially growing an electron supply layer above the channel layer, and a step of forming an electrode above the electron supply layer.
    Type: Grant
    Filed: March 6, 2015
    Date of Patent: October 25, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsushi Era, Akihito Ohno, Takahiro Yamamoto
  • Publication number: 20160195589
    Abstract: A degradation diagnosis system includes: a feature amount calculator and a diagnoser. The calculator reads a relation between: a ratio between a variation of a voltage of a secondary battery and a variation of an electric charge of the secondary battery; and the voltage or the electric charge of the secondary battery. The calculator identifies the voltage or the electric charge whose relation with the ratio satisfies a predefined condition and calculates a feature amount of the secondary battery. The diagnoser diagnoses degradation of the secondary battery, based on the feature amount. The calculator calculates the feature amount, based on a relation between: an integrated value within a range where a voltage or an electric charge is larger than the identified voltage or electric charge; and an integrated value within a range where the voltage or the electric charge is smaller, in a curve represented by the relational data.
    Type: Application
    Filed: March 10, 2016
    Publication date: July 7, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuki Hanyu, Takahiro Yamamoto
  • Publication number: 20160195590
    Abstract: According to one embodiment, there is provided a battery apparatus including a battery management device configured to receive voltages and temperatures of cells, and detection data of a current sensor, and a measuring computer configured to calculate a characteristic value of each cell or cell module, based on the detection data acquired from the battery management device at first time intervals, and to send, the acquired detection data or the calculated characteristic value to a control device at second time intervals which are longer than the first time intervals.
    Type: Application
    Filed: March 11, 2016
    Publication date: July 7, 2016
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shinichiro KOSUGI, Masahiro SEKINO, Masayuki HOSHINO, Hiroaki SAKURAI, Tomokazu MORITA, Takenori KOBAYASHI, Tomohiro TOYOSAKI, Masatake SAKUMA, Takahiro YAMAMOTO
  • Publication number: 20160187431
    Abstract: A storage battery includes power storage devices in series and switching circuits each arranged between adjacent power storage devices. Each switching circuit includes an input terminal I, an output terminal O, an input terminal Si, and an output terminal So, a first switch that electrically connects the input terminal Si and the output terminal O, a second switch that electrically connects the input terminal I and the output terminal So, a third switch that electrically connects the input terminal I and the output terminal O, and a fourth switch that electrically connects the input terminal Si and the output terminal So. The input terminal Si is electrically connected to the output terminal So of one of adjacent switching circuits and the output terminal So is electrically connected to the input terminal Si of the other of the adjacent switching circuits.
    Type: Application
    Filed: December 23, 2015
    Publication date: June 30, 2016
    Inventors: Takahiro Yamamoto, Yuki Hanyu, Akihiro Itakura, Toru Ezawa
  • Patent number: 9355841
    Abstract: A manufacturing method of a high electron mobility transistor includes: forming a GaN channel layer on a semi-insulating substrate in a first growth condition; forming a transition layer on the GaN channel layer while the first growth condition is changed to a second growth condition; and forming an AlGaN electron supply layer on the transition layer in the second growth condition, wherein the GaN channel layer, the transition layer, and the AlGaN electron supply layer are continuously formed without interrupting growth.
    Type: Grant
    Filed: May 22, 2015
    Date of Patent: May 31, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takahiro Yamamoto, Akihito Ohno, Atsushi Era
  • Patent number: 9355852
    Abstract: A method for manufacturing a semiconductor device includes: preparing a Si substrate having a flat portion with flat front and back surfaces and a bevel portion located at a periphery of the flat portion; forming a III-V nitride semiconductor film on the front surface of the Si substrate by epitaxial growth; and after forming the III-V nitride semiconductor film, grinding the Si substrate from the back surface. Amounts of working at the bevel portion on the front surface and the back surface of an outermost end portion of the bevel portion are asymmetrical. A first thickness measured from the front surface of the flat portion to the outermost end portion is smaller than a second thickness measured from the back surface of the flat portion to the outermost end portion.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: May 31, 2016
    Assignee: MITSUBISH ELECTRIC CORPORATION
    Inventor: Takahiro Yamamoto
  • Patent number: 9341468
    Abstract: A measuring apparatus includes a light projecting and receiving device configured to project and receive light, and measures an object based on the projected and received light. The measuring apparatus comprises a chamber configured to enclose a first space for accommodating the object; a partition configured to separate the first space from a second space which accommodates the light projecting and receiving device, and configured to transmit the light; a first regulator configured to regulate temperature of the first space to a first temperature by flowing a gas through the first space; and a second regulator configured to regulate temperature of the second space to a second temperature different from the first temperature by flowing a gas through the second space. The partition includes a plurality of partition walls disposed with a gap.
    Type: Grant
    Filed: November 3, 2013
    Date of Patent: May 17, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Tomofumi Nishikawara, Takahiro Yamamoto
  • Publication number: 20160116547
    Abstract: A storage battery evaluating apparatus according to an embodiment includes a determiner, a corrector, a QV curve generator, an evaluator, and a feedbacker. The determiner determines a charging/discharging tendency of a storage battery based on measurement data including voltage data. The corrector corrects the voltage data based on a correction parameter. The correction parameter corresponds to at least one of the charging/discharging tendency and a degraded state of the storage battery. The QV curve generator generates a QV curve of the storage battery based on the voltage data which has been corrected. The evaluator evaluates the degraded state based on the QV curve. The feedbacker feeds back, to the corrector, the corrected parameter corresponding to the degraded state.
    Type: Application
    Filed: October 23, 2015
    Publication date: April 28, 2016
    Inventors: Yuki HANYU, Takahiro YAMAMOTO, Toru EZAWA, Akihiro ITAKURA
  • Publication number: 20160077767
    Abstract: A print job is submitted from a client terminal 100 to two print servers 200?1, 200?2, a print server taking main charge 200?1 instructs a printer 300 to print one page at a time in sequence, and status information indicating the printing state is shared by the two print servers 200?1, 200?2. If a failure occurs in the print server taking main charge 200?1, then, on the basis of the status information shared by the two print servers 200?1, 200?2, a print server taking sub charge 200?2 instructs the printer 300 to print in accordance with the submitted print job from the unprinted page. This makes it possible to immediately continue the print from the page indicated to be completely printed when the failure occurred.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 17, 2016
    Inventors: Takahiro Yamamoto, Masatoshi Tanaka, Ko Shimazawa, Takahiro Sakimoto
  • Publication number: 20160071727
    Abstract: A manufacturing method of a high electron mobility transistor includes: forming a GaN channel layer on a semi-insulating substrate in a first growth condition; forming a transition layer on the GaN channel layer while the first growth condition is changed to a second growth condition; and forming an AlGaN electron supply layer on the transition layer in the second growth condition, wherein the GaN channel layer, the transition layer, and the AlGaN electron supply layer are continuously formed without interrupting growth.
    Type: Application
    Filed: May 22, 2015
    Publication date: March 10, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takahiro YAMAMOTO, Akihito OHNO, Atsushi ERA
  • Publication number: 20160054117
    Abstract: The present invention provides a measurement apparatus for measuring a shape of a test surface, comprising an optical system configured to irradiate a measurement point on the test surface and a reference surface with light, and cause test light and reference light reflected to interfere with each other, a detector configured to detect an optical path length difference between the test light and the reference light by using interfering light and a processor configured to determine a position of the measurement point based on a plurality of detection results by the detector, wherein a detection result includes an error which cyclically changes, and the plurality of detection results include n detection results obtained in n states in which optical path lengths of the test light are different from each other by 1/n (n?2) of a cycle of the error.
    Type: Application
    Filed: August 11, 2015
    Publication date: February 25, 2016
    Inventor: Takahiro Yamamoto
  • Patent number: 9270894
    Abstract: An imaging apparatus disclosed herein includes: a solid-state imaging device in which pixels are arranged in a matrix; a mechanical shutter; and a signal processing unit, wherein the signal processing unit: resets charge stored in all the pixels by closing the mechanical shutter and applying a voltage V2 to a photoelectric conversion unit; starts first exposure by opening the mechanical shutter and applying a voltage V1 to the photoelectric conversion unit; finishes the first exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a first still image; resets all the pixels; starts second exposure by applying the voltage V1 to the photoelectric conversion unit with the mechanical shutter open; finishes the second exposure by applying the voltage V2 to the photoelectric conversion unit with the mechanical shutter open; reads pixel signals to obtain a second still image.
    Type: Grant
    Filed: September 24, 2014
    Date of Patent: February 23, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Takahiro Yamamoto, Yoshiyuki Matsunaga, Takayuki Ota
  • Patent number: 9212308
    Abstract: A liquid crystal composition for forming a polymer/liquid crystal composite in which disorder of an orientation state is reduced is provided. The liquid crystal composition includes a liquid crystal material exhibiting a blue phase and a liquid crystalline monomer represented by the following general formula (G1). Note that the liquid crystal composition may include a non-liquid-crystalline monomer and a polymerization initiator. In the general formula (G1), X represents a mesogenic skeleton; and Y1 and Y2 individually represent an alkylene group having a sum of carbon atoms and/or oxygen atoms of 1 to 20. Also in the general formula (G1), the alkylene group and the alkyl group may include a carbonyl group and may have an ether bond. In addition, the carbonyl group and the ether bond may form an ester structure. In the general formula (G1), Z1 and Z2 individually represent an acryloyl group or a methacryloyl group.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: December 15, 2015
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Daisuke Kubota, Sachiko Kawakami, Makoto Ikenaga, Takahiro Yamamoto
  • Publication number: 20150348780
    Abstract: A method of manufacturing a semiconductor element includes a first step of epitaxially growing an AlN layer on a substrate, a second step of forming a buffer layer on the AlN layer by epitaxially growing AlxGayInzN where x, y, and z satisfy x+y+z=1 and y is not zero without adding Fe, a third step of forming a resistance layer on the buffer layer by epitaxially growing AlxGayInzN where x, y, and z satisfy x+y+z=1 and y is not zero while adding Fe, a step of epitaxially growing a channel layer on the resistance layer, a step of epitaxially growing an electron supply layer above the channel layer, and a step of forming an electrode above the electron supply layer.
    Type: Application
    Filed: March 6, 2015
    Publication date: December 3, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Atsushi ERA, Akihito OHNO, Takahiro YAMAMOTO
  • Patent number: 9172895
    Abstract: A solid-state imaging device including pixels, each pixel having a reset transistor, a selection transistor, an amplification transistor, and a photoelectric conversion unit. The photoelectric conversion unit has a photoelectric conversion film which performs photoelectric conversion, a pixel electrode formed on the surface of the photoelectric conversion film that faces the semiconductor substrate, and a transparent electrode formed on the surface of the photoelectric conversion film that is opposite to the pixel electrode, and the amplitude of a row reset signal applied to the gate of the reset transistor is smaller than at least one of (a) the maximum voltage applied to the drain of the amplification transistor, (b) the maximum voltage applied to the gate of the selection transistor, (c) the power source voltage applied to an inverting amplifier, and (d) the maximum voltage applied to a transparent electrode.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: October 27, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Makoto Yarino, Takahiro Yamamoto, Yoshiyuki Matsunaga
  • Patent number: 9150786
    Abstract: A novel polymerizable monomer compound that can be used for a variety of liquid crystal devices is provided. Particularly, a novel liquid crystal composition including the novel polymerizable monomer compound and exhibiting a blue phase is provided. Further, a liquid crystal display device manufactured with the use of the liquid crystal composition is provided. A polymerizable monomer compound represented by the following general formula (G1) is provided. In the general formula (G1), n and m are individually an integer from 1 to 20 and may be the same as or different from each other, and R1 and R2 individually represent hydrogen or a methyl group.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: October 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Makoto Ikenaga, Daisuke Kubota, Takahiro Yamamoto, Sachiko Kawakami
  • Publication number: 20150267320
    Abstract: A method for manufacturing a silicon carbide semiconductor device includes: preparing a silicon carbide single crystal substrate having a flatness with an average roughness of 0.2 nm or less; gas-etching a surface of the silicon carbide single crystal substrate under an atmosphere of a reducing gas; and forming a silicon carbide layer on the gas-etched surface of the silicon carbide single crystal substrate, wherein an etching rate of the gas etching is made in a range of 0.5 ?m/hour or faster to 2.0 ?m/hour or slower.
    Type: Application
    Filed: December 29, 2014
    Publication date: September 24, 2015
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihito OHNO, Yoichiro MITANI, Takahiro YAMAMOTO, Nobuyuki TOMITA, Kenichi HAMANO