Patents by Inventor Takahisa Amemiya

Takahisa Amemiya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6525342
    Abstract: A display device comprises a gate metal and a data metal formed in an array region and in a periphery region outside of the array region of the display device. A planarizing layer is formed over the array region and the periphery region. Vias are patterned into the planarizing layer in the array region and the periphery region to expose portions of at least one of the gate metal and the data metal. A transparent conductor is deposited in the array region and the periphery region. A metal layer is locally deposited over the transparent conductor in selected areas of the periphery region. The metal layer and the transparent conductor are patterned to form an additional wiring level and/or to form connections between the gate metal and the data metal in the periphery region and to form transparent pixel electrodes in the array region.
    Type: Grant
    Filed: May 23, 2001
    Date of Patent: February 25, 2003
    Assignee: International Business Machines Corporation
    Inventors: Takahisa Amemiya, Toshiaki Arai, Evan George Colgan, Yoshitami Sakaguchi, Kazumi Sakai, Kai R. Schleupen
  • Publication number: 20020177281
    Abstract: A display device and method for fabrication are disclosed. A gate metal and a data metal are formed in an array region and in a periphery region outside of the array region of the display device. A planarizing layer is formed over the array region and the periphery region, and vias are patterned into the planarizing layer in the array region and the periphery region to expose portions of at least one of the gate metal and the data metal. A transparent conductor is deposited in the array region and the periphery region. A metal layer is locally deposited over the transparent conductor in selected areas of the periphery region. Then, using a same lithographic pattern, the metal layer and the transparent conductor are patterned to form an additional wiring level and/or to form connections between the gate metal and the data metal in the periphery region and to form transparent pixel electrodes in the array region.
    Type: Application
    Filed: May 23, 2001
    Publication date: November 28, 2002
    Applicant: International Business Machines Corporation
    Inventors: Takahisa Amemiya, Toshiaki Arai, Evan George Colgan, Yoshitami Sakaguchi, Kazumi Sakai, Kai R. Schleupen
  • Patent number: 6064360
    Abstract: An afterimage occurring on a liquid crystal display is eliminated at the time of turning off the system power with an inexpensive circuit construction, without the need for reserving a special power supply. The afterimage continues to be displayed for a certain period of time after the turning-off of the power supply, and is eliminated by the load capacitance processed by liquid crystal display elements in a liquid crystal display panel.
    Type: Grant
    Filed: May 8, 1998
    Date of Patent: May 16, 2000
    Assignee: International Business Machines Corporation
    Inventors: Tetsuya Sakaedani, Takahisa Amemiya, Midori Suzuki