Patents by Inventor Takahito Takemoto

Takahito Takemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10777497
    Abstract: Provided is a substrate including a first wiring layer, wherein the first wiring layer has a structure in which among a plurality of first connection parts of a plurality of vias, at least one of first connection parts of two vias located closer to both ends of the first wiring layer is coupled to a body of the first wiring layer through a first conductive portion, each of the plurality of first connection parts being coupled to the first wiring layer, and a cross-sectional area of the first conductive portion is less than an area of a first part of the first wiring layer, the first part being in contact with a first connection part of a via other than the first connection parts of the two vias.
    Type: Grant
    Filed: January 9, 2019
    Date of Patent: September 15, 2020
    Assignee: FUJITSU LIMITED
    Inventor: Takahito Takemoto
  • Publication number: 20190229049
    Abstract: Provided is a substrate including a first wiring layer, wherein the first wiring layer has a structure in which among a plurality of first connection parts of a plurality of vias, at least one of first connection parts of two vias located closer to both ends of the first wiring layer is coupled to a body of the first wiring layer through a first conductive portion, each of the plurality of first connection parts being coupled to the first wiring layer, and a cross-sectional area of the first conductive portion is less than an area of a first part of the first wiring layer, the first part being in contact with a first connection part of a via other than the first connection parts of the two vias.
    Type: Application
    Filed: January 9, 2019
    Publication date: July 25, 2019
    Applicant: FUJITSU LIMITED
    Inventor: Takahito TAKEMOTO
  • Patent number: 9699887
    Abstract: A circuit board includes a substrate, a first ground electrode group, and a first pair of signal electrodes. The first ground electrode group includes a plurality of first ground electrodes, where each of the plurality of the first ground electrodes is disposed at a corresponding one of vertexes of a first rectangular area in a surface of the substrate. the first pair of signal electrodes is disposed in the first rectangular area and is arranged in a first direction parallel to a side of the first rectangular area.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: July 4, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Daisuke Mizutani, Kenichi Kawai, Takahito Takemoto, Masateru Koide
  • Publication number: 20140293566
    Abstract: A circuit board includes a substrate, a first ground electrode group, and a first pair of signal electrodes. The first ground electrode group includes a plurality of first ground electrodes, where each of the plurality of the first ground electrodes is disposed at a corresponding one of vertexes of a first rectangular area in a surface of the substrate. the first pair of signal electrodes is disposed in the first rectangular area and is arranged in a first direction parallel to a side of the first rectangular area.
    Type: Application
    Filed: March 7, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Daisuke Mizutani, Kenichi Kawai, Takahito Takemoto, Masateru Koide
  • Patent number: 7948228
    Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.
    Type: Grant
    Filed: November 9, 2009
    Date of Patent: May 24, 2011
    Assignee: Fujitsu Limited
    Inventors: Takahito Takemoto, Akihiko Harada, Kazuhiro Furuya
  • Publication number: 20100052726
    Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.
    Type: Application
    Filed: November 9, 2009
    Publication date: March 4, 2010
    Applicant: Fujitsu Limited
    Inventors: Takahito TAKEMOTO, Akihiko Harada, Kazuhiro Furuya
  • Patent number: 7635986
    Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: December 22, 2009
    Assignee: Fujitsu Limited
    Inventors: Takahito Takemoto, Akihiko Harada, Kazuhiro Furuya
  • Publication number: 20080106324
    Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.
    Type: Application
    Filed: April 19, 2007
    Publication date: May 8, 2008
    Applicant: Fujitsu Limited
    Inventors: Takahito TAKEMOTO, Akihiko Harada, Kazuhiro Furuya