Patents by Inventor Takahito Takemoto
Takahito Takemoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11927569Abstract: Ultrasonic flaw detection uses a phased-array ultrasonic-flaw-detection probe. The flaw detection probe is placed such that the center of curvature of the flaw detection probe coincides with a reference center of curvature of a subject. The flaw detection probe is translated along a scan direction. The flaw detection probe emits an ultrasonic beam such that the position upon which the ultrasonic beam converges coincides with the center of curvature of the curve of the outline of the cross section of the subject at the scan position, receives the resulting reflected beam, and estimates the length of a flaw in the circumferential direction of the subject. In addition, the estimated length of the flaw is corrected using a correction coefficient corresponding to the distance between the center of curvature of the reference scan position and the center of curvature of the scan position in the thickness direction of the subject.Type: GrantFiled: January 30, 2020Date of Patent: March 12, 2024Assignee: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Hiroshi Takemoto, Mitsuyoshi Uematsu, Seiji Kobayashi, Takahito Shimomukai, Naoya Iwata
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Publication number: 20240067579Abstract: Provided is a surface treatment agent capable of imparting superior antifouling property as well as good and durable hydrophilicity to an inorganic substrate. The surface treatment agent is one comprising a pretreatment agent and a hydrophilizing treatment agent and being to be sequentially applied to an inorganic substrate, wherein the pretreatment agent comprises a silane compound having a reactive silyl group and an organic functional group and a polyfunctional monomer, and the polyfunctional monomer has one or more first reactive groups that react with the organic functional group and one or more second reactive groups that react with the hydrophilizing treatment agent.Type: ApplicationFiled: December 13, 2021Publication date: February 29, 2024Applicants: LIXIL Corporation, NIPPON PAINT AUTOMOTIVE COATINGS CO., LTD.Inventors: Yoshihito OKUMURA, Yusuke NAKASHIMA, Kazuki YOSHIOKA, Takahito NAKASE, Yusuke SATO, Yugo TAKEMOTO, Kiyoe MAEJIMA
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Patent number: 10777497Abstract: Provided is a substrate including a first wiring layer, wherein the first wiring layer has a structure in which among a plurality of first connection parts of a plurality of vias, at least one of first connection parts of two vias located closer to both ends of the first wiring layer is coupled to a body of the first wiring layer through a first conductive portion, each of the plurality of first connection parts being coupled to the first wiring layer, and a cross-sectional area of the first conductive portion is less than an area of a first part of the first wiring layer, the first part being in contact with a first connection part of a via other than the first connection parts of the two vias.Type: GrantFiled: January 9, 2019Date of Patent: September 15, 2020Assignee: FUJITSU LIMITEDInventor: Takahito Takemoto
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Publication number: 20190229049Abstract: Provided is a substrate including a first wiring layer, wherein the first wiring layer has a structure in which among a plurality of first connection parts of a plurality of vias, at least one of first connection parts of two vias located closer to both ends of the first wiring layer is coupled to a body of the first wiring layer through a first conductive portion, each of the plurality of first connection parts being coupled to the first wiring layer, and a cross-sectional area of the first conductive portion is less than an area of a first part of the first wiring layer, the first part being in contact with a first connection part of a via other than the first connection parts of the two vias.Type: ApplicationFiled: January 9, 2019Publication date: July 25, 2019Applicant: FUJITSU LIMITEDInventor: Takahito TAKEMOTO
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Patent number: 9699887Abstract: A circuit board includes a substrate, a first ground electrode group, and a first pair of signal electrodes. The first ground electrode group includes a plurality of first ground electrodes, where each of the plurality of the first ground electrodes is disposed at a corresponding one of vertexes of a first rectangular area in a surface of the substrate. the first pair of signal electrodes is disposed in the first rectangular area and is arranged in a first direction parallel to a side of the first rectangular area.Type: GrantFiled: March 7, 2014Date of Patent: July 4, 2017Assignee: FUJITSU LIMITEDInventors: Daisuke Mizutani, Kenichi Kawai, Takahito Takemoto, Masateru Koide
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Publication number: 20140293566Abstract: A circuit board includes a substrate, a first ground electrode group, and a first pair of signal electrodes. The first ground electrode group includes a plurality of first ground electrodes, where each of the plurality of the first ground electrodes is disposed at a corresponding one of vertexes of a first rectangular area in a surface of the substrate. the first pair of signal electrodes is disposed in the first rectangular area and is arranged in a first direction parallel to a side of the first rectangular area.Type: ApplicationFiled: March 7, 2014Publication date: October 2, 2014Applicant: FUJITSU LIMITEDInventors: Daisuke Mizutani, Kenichi Kawai, Takahito Takemoto, Masateru Koide
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Patent number: 7948228Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.Type: GrantFiled: November 9, 2009Date of Patent: May 24, 2011Assignee: Fujitsu LimitedInventors: Takahito Takemoto, Akihiko Harada, Kazuhiro Furuya
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Publication number: 20100052726Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.Type: ApplicationFiled: November 9, 2009Publication date: March 4, 2010Applicant: Fujitsu LimitedInventors: Takahito TAKEMOTO, Akihiko Harada, Kazuhiro Furuya
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Patent number: 7635986Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.Type: GrantFiled: April 19, 2007Date of Patent: December 22, 2009Assignee: Fujitsu LimitedInventors: Takahito Takemoto, Akihiko Harada, Kazuhiro Furuya
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Publication number: 20080106324Abstract: To accurately measure power source noise generated inside an integrated circuit, the power source noise measuring device comprises: a mutual inductor pair placed inside an integrated circuit, the mutual inductor pair including (i) a first inductor connected to between power source voltages of the integrated circuit and (ii) a second inductor arranged opposite the first inductor, the both ends of which second inductor are connected to external output terminals; and a power source noise measuring unit which measures power source noise of the integrated circuit on the basis of a voltage waveform output from the second inductor of said mutual inductor pair via the external output terminals.Type: ApplicationFiled: April 19, 2007Publication date: May 8, 2008Applicant: Fujitsu LimitedInventors: Takahito TAKEMOTO, Akihiko Harada, Kazuhiro Furuya