Abstract: In a DC-DC converter including an inductor connected to an input terminal, a MOS transistor connected between the inductor and a ground terminal, a diode for supplying energy accumulated by the inductor to an output terminal, a capacitor connected between the output terminal and the ground terminal, a driver circuit for driving the MOS transistor, and a control circuit for controlling the driver circuit, a voltage doubler is provided to generate a power supply voltage approximately twice an output voltage at the output terminal and supply the power supply voltage to the driver circuit and the control circuit.

Abstract: Switching power supply circuit of the invention is provided with an nMOS transistor (Q1) and a pMOS transistor (Q2) connected in parallel inversely for switching an input DC voltage, and a driving circuit (3) for switching the nMOS transistor (Q1) when the duty-cycle is small and the pMOS transistor (Q2) when the duty-cycle becomes large. Therefore a stable output voltage can be obtained through the pMOS transistor (Q2) against fall of the input DC voltage supplied from a battery until its available limit determined by on-resistance of the pMOS transistor (Q2), while the stable output voltage can be obtained with minimum driving loss through the nMOS transistor (Q1) having smaller input parasitic capacitance compared to the pMOS transistor (Q2), when the input DC voltage is sufficiently high.

Abstract: A charge/discharge circuit includes a charge/discharge path consisting of only an N-channel MOS transistor connected between a first terminal to be connected to a secondary ceil and a second terminal to be connected to an external DC voltage supply and a load. A first comparator is connected to the first terminal for detecting whether or not the secondary cell is in an overdischarged condition. A second comparator is also connected to the first terminal for detecting whether or not the secondary cell is in an overcharged condition. A third comparator is connected to the second terminal for detecting whether or not a voltage is supplied from the external DC voltage supply. A control logic circuit is connected to the first, second and third comparators so as to bring the MOS transistor into an OFF condition when no voltage is supplied from the external DC voltage supply and the secondary cell is in the overdischarged condition, or when the secondary cell is in the overcharged condition.