Patents by Inventor Takaji Otsu

Takaji Otsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5236861
    Abstract: A method of manufacturing a metal-insulator-semiconductor (MIS) device in which a gate electrode is formed to cover the upper portion of a device forming region which is isolated by a trench is comprised of a step of forming a laminated film including at least an oxidation proof film on a substrate, a step of selectively removing parts of the laminated film and a part of the substrate beneath the laminated film to thereby form a trench in the substrate, a step of burying an insulation film in the trench, and a step of performing a selective oxidation on the entire surface of the insulation film.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: August 17, 1993
    Assignee: Sony Corporation
    Inventor: Takaji Otsu
  • Patent number: 5189499
    Abstract: A charge-coupled device has a multi-layer structure insulating layer is formed beneath a transfer electrode, floating electrodes and an electrode adjacent the floating electrodes so that pin hole phenomenon in a charge transfer section of the charge coupled device can be successfully prevented. On the other hand, a sole-layer structure insulating layer is formed beneath a gate electrode of a peripheral component so that a threshold voltage of the gate electrode of the peripheral component can be successfully controlled at a desired value.
    Type: Grant
    Filed: October 8, 1991
    Date of Patent: February 23, 1993
    Assignee: Sony Corporation
    Inventors: Akio Izumi, Yasuhito Maki, Tadakuni Narabu, Maki Sato, Takaji Otsu, Katsuyuki Saito
  • Patent number: 5083178
    Abstract: A semiconductor device of a master slice type comprises a basic cell comprising: first and second MOS transistors of a first conductivity type in each of which one of a source region and a drain region is commonly used; third and fourth MOS transistors of the first conductivity type in each of which one of a source region and a drain region is commonly used; fifth and sixth MOS transistors of a second conductivity type in each of which one of a source region and a drain region is commonly used; and seventh and eighth MOS transistors of the second conductivity type in each of which one of a source region and a drain region is commonly used. Gate electrodes of the first and third MOS transistors are commonly used, gate electrodes of the second and fourth MOS transistors are commonly used, and gate electrodes of the fifth and seventh MOS transistors are commonly used.
    Type: Grant
    Filed: August 24, 1990
    Date of Patent: January 21, 1992
    Assignee: Sony Corporation
    Inventor: Takaji Otsu