Patents by Inventor Takaki Hashimoto

Takaki Hashimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210270750
    Abstract: A measurement apparatus is provided which includes a wafer stage having an upper surface on which a wafer to be measured is placed; a light source capable of illuminating the upper surface with predetermined light; a light detection portion configured to take an image of the wafer illuminated with the predetermined light by the light source; a polarization element provided between the light source and the wafer stage, or between the wafer stage and the light detection portion; and a controller. The controller takes a difference value between two signals that are obtained based on corresponding types of polarization states, in each of which a first and second element of a Stokes Vector are same, and thus measures an asymmetric structure within the wafer, based on the difference value.
    Type: Application
    Filed: August 21, 2020
    Publication date: September 2, 2021
    Applicant: Kioxia Corporation
    Inventors: Yenting KUO, Takaki HASHIMOTO
  • Patent number: 10295409
    Abstract: According to one embodiment, a value of a film thickness of a processing object disposed above a substrate is obtained. Then, a wavelength that provides a highest degree of intensity of signal light reflected when the signal light is incident onto the processing object having the value of the film thickness, based on wavelength selection reference information is selected. Then, a first instruction performing an alignment process to the substrate by use of signal light having a wavelength thus selected is generated. The wavelength selection reference information is information that includes a correlation between values of the film thickness of the processing object and degrees of intensity of the signal light, with respect to a plurality of wavelengths.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: May 21, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Miki Toshima, Satoshi Usui, Manabu Takakuwa, Nobuhiro Komine, Takaki Hashimoto
  • Patent number: 10151972
    Abstract: A manufacturing method of a photomask according to the embodiment sets an exposure condition applied when a resist is formed into a three-dimensional target shape by using a photomask including a plurality of light-shielding areas. Subsequently, the method sets a hypothetical target shape obtained by correcting a target shape based on a development characteristic of the resist for the exposure condition. Subsequently, the method creates a pattern of the photomask corresponding to the hypothetical target shape. Subsequently, the method simulates a prediction shape of the resist when the pattern is used. Subsequently, the method calculates a cost function related to an error between the prediction shape and the hypothetical target shape. Subsequently, the method adjusts the pattern based on a result of the calculation of the cost function.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: December 11, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takaki Hashimoto, Satoshi Usui, Naoki Sato, Kouichi Nakayama, Masahiro Miyairi, Syogo Okamoto
  • Patent number: 10120275
    Abstract: According to one embodiment, a layout region of a mask pattern is divided into N (N is an integer of 2 or larger) units, a main pattern resolved by exposure light is arranged and sub patterns not resolved by the exposure light are arranged outside the main pattern such that distributions of attenuation amount of the exposure light in the divided layout regions are different.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: November 6, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Masakazu Hamasaki, Yoshihiro Yanai, Michiya Takimoto, Naoki Sato, Satoshi Usui, Takaki Hashimoto
  • Publication number: 20180157167
    Abstract: A manufacturing method of a photomask according to the embodiment sets an exposure condition applied when a resist is formed into a three-dimensional target shape by using a photomask including a plurality of light-shielding areas. Subsequently, the method sets a hypothetical target shape obtained by correcting a target shape based on a development characteristic of the resist for the exposure condition. Subsequently, the method creates a pattern of the photomask corresponding to the hypothetical target shape. Subsequently, the method simulates a prediction shape of the resist when the pattern is used. Subsequently, the method calculates a cost function related to an error between the prediction shape and the hypothetical target shape. Subsequently, the method adjusts the pattern based on a result of the calculation of the cost function.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 7, 2018
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takaki HASHIMOTO, Satoshi Usui, Naoki Sato, Kouichi Nakayama, Masahiro Miyairi, Syogo Okamoto
  • Patent number: 9910363
    Abstract: According to one embodiment, in a measurement apparatus, a controller acquires a first signal waveform, a second signal waveform, and a third signal waveform. Among mth diffraction light and ±nth diffraction light, the first signal waveform is related to spatial distribution of light intensity about first interference light by interference of the ±nth diffraction light. The second signal waveform is related to spatial distribution of light intensity about second interference light by interference of the mth diffraction light and the +nth diffraction light. The third signal waveform is related to spatial distribution of light intensity about third interference light by interference of the mth diffraction light and the ?nth diffraction light. The controller calculates a measurement error component based on a phase difference between the second signal waveform and the third signal waveform. The controller corrects the first signal waveform with using the calculated measurement error component.
    Type: Grant
    Filed: March 9, 2016
    Date of Patent: March 6, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Ai Furubayashi, Takaki Hashimoto
  • Publication number: 20170329887
    Abstract: According to one embodiment, a layout region of a mask pattern is divided into N (N is an integer of 2 or larger) units, a main pattern resolved by exposure light is arranged and sub patterns not resolved by the exposure light are arranged outside the main pattern such that distributions of attenuation amount of the exposure light in the divided layout regions are different.
    Type: Application
    Filed: September 2, 2016
    Publication date: November 16, 2017
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Masakazu HAMASAKI, Yoshihiro Yanai, Michiya Takimoto, Naoki Sato, Satoshi Usui, Takaki Hashimoto
  • Publication number: 20170235232
    Abstract: According to one embodiment, a value of a film thickness of a processing object disposed above a substrate is obtained. Then, a wavelength that provides a highest degree of intensity of signal light reflected when the signal light is incident onto the processing object having the value of the film thickness, based on wavelength selection reference information is selected. Then, a first instruction performing an alignment process to the substrate by use of signal light having a wavelength thus selected is generated. The wavelength selection reference information is information that includes a correlation between values of the film thickness of the processing object and degrees of intensity of the signal light, with respect to a plurality of wavelengths.
    Type: Application
    Filed: June 1, 2016
    Publication date: August 17, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Miki TOSHIMA, Satoshi USUI, Manabu TAKAKUWA, Nobuhiro KOMINE, Takaki HASHIMOTO
  • Patent number: 9703912
    Abstract: According to one embodiment, there is provided a mask set including a first mask and a second mask. The first mask includes a first device pattern and a first mark pattern. The first mark pattern is used for an inspection of a position of the first device pattern on a surface of the first mask. The second mask is used to perform multiple exposure on a substrate together with the first mask. The second mask includes a second device pattern and a second mark pattern. The second mark pattern is used for an inspection of a position of the second device pattern on a surface of the second mask. The second mark pattern includes a pattern corresponding to a pattern obtained by inverting the first mark pattern.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: July 11, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ai Furubayashi, Takashi Obara, Takaki Hashimoto, Nobuhiro Komine
  • Patent number: 9698157
    Abstract: A microstructure body according to an embodiment includes a stacked body. The stacked body includes a plurality of unit structure bodies stacked periodically along a first direction. A configuration of an end portion of the stacked body in a second direction is a stairstep configuration including terraces formed every unit structure body. The second direction intersects the first direction. A first distance in a third direction between end edges of two of the unit structure bodies facing the third direction is shorter than a second distance in the second direction between end edges of the two of the unit structure bodies facing the second direction. The third direction intersects both the first direction and the second direction.
    Type: Grant
    Filed: August 25, 2015
    Date of Patent: July 4, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuko Kono, Takaki Hashimoto, Yuji Setta, Toshiya Kotani, Chikaaki Kodama
  • Publication number: 20170068170
    Abstract: According to one embodiment, in a measurement apparatus, a controller acquires a first signal waveform, a second signal waveform, and a third signal waveform. Among mth diffraction light and ±nth diffraction light, the first signal waveform is related to spatial distribution of light intensity about first interference light by interference of the ±nth diffraction light. The second signal waveform is related to spatial distribution of light intensity about second interference light by interference of the mth diffraction light and the +nth diffraction light. The third signal waveform is related to spatial distribution of light intensity about third interference light by interference of the mth diffraction light and the ?nth diffraction light. The controller calculates a measurement error component based on a phase difference between the second signal waveform and the third signal waveform. The controller corrects the first signal waveform with using the calculated measurement error component.
    Type: Application
    Filed: March 9, 2016
    Publication date: March 9, 2017
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ai FURUBAYASHI, Takaki HASHIMOTO
  • Publication number: 20160268278
    Abstract: A microstructure body according to an embodiment includes a stacked body. The stacked body includes a plurality of unit structure bodies stacked periodically along a first direction. A configuration of an end portion of the stacked body in a second direction is a stairstep configuration including terraces formed every unit structure body. The second direction intersects the first direction. A first distance in a third direction between end edges of two of the unit structure bodies facing the third direction is shorter than a second distance in the second direction between end edges of the two of the unit structure bodies facing the second direction. The third direction intersects both the first direction and the second direction.
    Type: Application
    Filed: August 25, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuko KONO, Takaki Hashimoto, Yuji Setta, Toshiya Kotani, Chikaaki Kodama
  • Publication number: 20160266484
    Abstract: According to one embodiment, there is provided a mask set including a first mask and a second mask. The first mask includes a first device pattern and a first mark pattern. The first mark pattern is used for an inspection of a position of the first device pattern on a surface of the first mask. The second mask is used to perform multiple exposure on a substrate together with the first mask. The second mask includes a second device pattern and a second mark pattern. The second mark pattern is used for an inspection of a position of the second device pattern on a surface of the second mask. The second mark pattern includes a pattern corresponding to a pattern obtained by inverting the first mark pattern.
    Type: Application
    Filed: June 23, 2015
    Publication date: September 15, 2016
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Ai Furubayashi, Takashi Obara, Takaki Hashimoto, Nobuhiro Komine
  • Patent number: 9257367
    Abstract: According to one embodiment, a method for producing a mask layout of an exposure mask for forming wiring of an integrated circuit device, includes estimating shape of the wiring formed based on an edge of a pattern included in an initial layout of the exposure mask. The method includes modifying shape of the edge if the estimated shape of the wiring does not satisfy a requirement.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: February 9, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Motohiro Okada, Shuhei Sota, Takaki Hashimoto, Yasunobu Kai, Kazuyuki Masukawa, Yuko Kono, Chikaaki Kodama, Taiga Uno, Hiromitsu Mashita
  • Publication number: 20150070681
    Abstract: In general, according to one embodiment, a pattern generating method evaluates an amount of flare generated through a mask during an EUV exposure; calculates optimal coverage of a mask pattern for enhancing uniformity of the amount of flare in an exposure region by applying an optimization algorithm; and generates a dummy pattern of the mask based upon the coverage of the mask pattern.
    Type: Application
    Filed: February 24, 2014
    Publication date: March 12, 2015
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Taiga Uno, Takaki Hashimoto
  • Publication number: 20150008584
    Abstract: According to one embodiment, a semiconductor device includes a plurality of wires arranged in parallel at a predetermined pitch, a plurality of first contacts that are each connected to an odd-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to a wiring direction of the wires, and a plurality of second contacts that are each connected to an even-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to the wiring direction of the wires in such a way as to be offset from the first contacts in the wiring direction of the wires, in which the first contacts are offset from the second contacts by a pitch of the wires in an orthogonal direction with respect to the wiring direction of the wires.
    Type: Application
    Filed: September 26, 2014
    Publication date: January 8, 2015
    Inventors: Takaki Hashimoto, Yasunobu Kai, Toshiya Kotani
  • Patent number: 8865589
    Abstract: According to one embodiment, a semiconductor device includes a plurality of wires arranged in parallel at a predetermined pitch, a plurality at first contacts that are each connected to an odd-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to a wiring direction of the wires, and a plurality of second contacts that are each connected to an even-numbered wire among the wires and are arranged in parallel in an orthogonal direction with respect to the wiring direction of the wires in such a way as to be offset from the first contacts in the wiring direction of the wires, in which the first contacts are offset from the second contacts by a pitch of the wires in an orthogonal direction with respect to the wiring direction of the wires.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: October 21, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takaki Hashimoto, Yasunobu Kai, Toshiya Kotani
  • Publication number: 20140252639
    Abstract: According to one embodiment, a method for producing a mask layout of an exposure mask for forming wiring of an integrated circuit device, includes estimating shape of the wiring formed based on an edge of a pattern included in an initial layout of the exposure mask. The method includes modifying shape of the edge if the estimated shape of the wiring does not satisfy a requirement.
    Type: Application
    Filed: August 19, 2013
    Publication date: September 11, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Motohiro OKADA, Shuhei SOTA, Takaki HASHIMOTO, Yasunobu KAI, Kazuyuki MASUKAWA, Yuko KONO, Chikaaki KODAMA, Taiga UNO, Hiromitsu MASHITA
  • Patent number: 8778570
    Abstract: According to one embodiment, a photomask includes a substrate, a film portion, a pattern, and a plurality of detection marks. The film portion is provided on a surface of the substrate. The film portion has a light transmittance lower than light transmittance of the substrate. The pattern is provided in a surface of the film portion. The pattern is configured to be transferred to a transfer target. The plurality of detection marks is provided in the film portion, with intensity of light transmitted through the detection marks being suppressed so as to suppress transfer the detection marks to the transfer target.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Okuda, Yosuke Okamoto, Takaki Hashimoto, Hidenori Sato
  • Patent number: 8679731
    Abstract: A semiconductor device manufacturing method includes applying illumination light to a photomask, and projecting diffracted light components from the photomask via a projection optical system to form a photoresist pattern on a substrate. The photomask includes a plurality of opening patterns which are arranged on each of a plurality of parallel lines at regular second intervals in a second direction and which have regular first intervals in a first direction perpendicular to the second direction. The plurality of opening patterns arranged on the adjacent ones of the plurality of parallel lines are displaced from each other half the second interval in the second direction. Moreover, the dimensions of the plurality of opening patterns and the complex amplitude transmittance of nontransparent region in the photomask are set so that three of the diffracted light components passing through the pupil of the projection optical system have equal amplitude.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: March 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuya Fukuhara, Takaki Hashimoto, Kazuyuki Masukawa, Yasunobu Kai