Patents by Inventor Takako Sato

Takako Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11958385
    Abstract: A seat includes a seat body and a sensor configured to acquired information on an occupant seated on the seat body. The seat includes a coating as a location marker that marks a location of the sensor to render the location visually recognizable from outside the seat body.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: April 16, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Ryuichiro Hirose, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Atsushi Kusano, Yoshikazu Ito, Yousuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
  • Patent number: 11932147
    Abstract: Disclosed is a seat including: sensors which includes a first cushion sensor provided at a seat cushion in a position corresponding to buttocks of an occupant, a second cushion sensor provided at the seat cushion and located farther frontward than the first cushion sensor, a first back sensor provided at a seat back and located in a lower position thereof, and a second back sensor provided at the seat back and located above the first back sensor; and a controller connected to the sensors and thereby allowed to acquire pressure values from the respective sensors. The controller is configured to identify the motion of the occupant based on outputs of at least two sensors of the first cushion sensor, the second cushion sensor, the first back sensor, and the second back sensor.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: March 19, 2024
    Assignee: TS TECH CO., LTD.
    Inventors: Hiroyuki Kaku, Atsushi Kusano, Hiroyuki Numajiri, Satoshi Fujita, Takako Miyoshi, Munetaka Kowa, Ryuichiro Hirose, Yoshikazu Ito, Yosuke Higashi, Satoshi Suzuki, Ryosuke Sato, Kento Uetake, Yasuharu Otsuka, Satoru Kaneda
  • Publication number: 20230318334
    Abstract: A control apparatus controls a charging device that is connected to a secondary battery having a negative electrode which is a mixture of graphite and silicon monoxide and supplies a current to the secondary battery, wherein when a calculated SOC (State of Charge) of the secondary battery is less than 15%, a magnitude of the current supplied to the secondary battery by the charging device is controlled to a first value, and when the calculated SOC of the secondary battery is equal to or more than 15%, the magnitude of the current supplied to the secondary battery by the charging device is controlled to a second value that is larger than the first value.
    Type: Application
    Filed: March 24, 2023
    Publication date: October 5, 2023
    Inventors: Takako Sato, Hirotaka Nakagawa, Sae Shinjo, Atsushi Tamai, Hanzhi Yang, Junji Kuwabara, Yusuke Kawano, Masafumi Shiwa, Yurika Nishimoto
  • Publication number: 20220046793
    Abstract: A multilayer resin substrate includes insulating resin base material layers, and conductor patterns on at least one of the insulating resin base material layers. The conductor patterns include a ground conductor on a main surface of the insulating resin base material layers and extend into a frame shape or a planar shape, and the ground conductor includes openings. An aperture ratio of the openings in an outer peripheral portion of the ground conductor is less than an aperture ratio of the openings in an inner peripheral portion of the ground conductor.
    Type: Application
    Filed: October 21, 2021
    Publication date: February 10, 2022
    Inventors: Takako SATO, Hiroki MAEGAWA
  • Patent number: 11064606
    Abstract: A multilayer substrate includes a stacked body including a plurality of insulating base material layers stacked on each other and a plurality of conductor patterns provided in contact with the plurality of insulating base material layers. The stacked body includes a first surface, and the plurality of conductor patterns include a plurality of mounting electrodes. The plurality of mounting electrodes include first openings. The first openings, in a plan view of a mounting surface, are provided over a mounting region and a non-mounting region of the mounting electrodes. The mounting region, when a mounted component is mounted, overlaps with the mounted component, and the non-mounting region does not overlap with the mounted component.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: July 13, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takako Sato
  • Patent number: 10980112
    Abstract: A multilayer wiring board includes first and second insulating layers, a first conductive wiring layer on the first insulating layer, a second conductive wiring layer on a surface of the second insulating layer facing the first insulating layer, an interlayer connection conductor including an intermetallic compound and penetrating through the first insulating layer to interconnect the first and second conductive wiring layers, a first intermetallic compound layer between the first conductive wiring layer and the interlayer connection conductor, and a second intermetallic compound layer between the second conductive wiring layer and the interlayer connection conductor, wherein the intermetallic compounds in the first and second intermetallic compound layers have a composition different from that of the intermetallic compound in the interlayer connection conductor, and the first intermetallic compound layer is located at a level different from a level of an interface between the first conductive wiring layer an
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: April 13, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takako Sato, Takeshi Osuga, Masanori Okamoto
  • Publication number: 20200315010
    Abstract: A multilayer substrate includes a stacked body including a plurality of insulating base material layers stacked on each other and a plurality of conductor patterns provided in contact with the plurality of insulating base material layers. The stacked body includes a first surface, and the plurality of conductor patterns include a plurality of mounting electrodes. The plurality of mounting electrodes include first openings. The first openings, in a plan view of a mounting surface, are provided over a mounting region and a non-mounting region of the mounting electrodes. The mounting region, when a mounted component is mounted, overlaps with the mounted component, and the non-mounting region does not overlap with the mounted component.
    Type: Application
    Filed: June 17, 2020
    Publication date: October 1, 2020
    Inventor: Takako SATO
  • Publication number: 20200113050
    Abstract: A multilayer wiring board includes first and second insulating layers, a first conductive wiring layer on the first insulating layer, a second conductive wiring layer on a surface the second insulating layer facing the first insulating layer, an interlayer connection conductor including an intermetallic compound and penetrating through the first insulating layer to interconnect the first and second conductive wiring layers, a first intermetallic compound layer between the first conductive wiring layer and the interlayer connection conductor, and a second intermetallic compound layer between the second conductive wiring layer and the interlayer connection conductor, wherein the intermetallic compounds in the first and second intermetallic compound layers have a composition different from that of the intermetallic compound in the interlayer connection conductor, and the first intermetallic compound layer at a level different from a level of an interface between the first conductive wiring layer and the first in
    Type: Application
    Filed: December 10, 2019
    Publication date: April 9, 2020
    Inventors: Takako SATO, Takeshi OSUGA, Masanori OKAMOTO
  • Patent number: 9424981
    Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: August 23, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Tomoya Yokoyama, Takako Sato
  • Patent number: 9204545
    Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: December 1, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shigetoshi Hayashi, Tomoya Yokoyama, Takako Sato
  • Patent number: 9129733
    Abstract: A laminated inductor element is configured to prevent warpage of the entire element with a structure in which a non-magnetic ferrite layer on an upper surface side is reduced in thickness to achieve a reduction in height of the entire element, a non-magnetic ferrite layer on a lower surface side is increased in thickness to be thicker than the non-magnetic ferrite layer so as to prevent a metal component diffused from a magnetic ferrite layer from coming into electrical contact with a land electrode of a mounting substrate, and an inductor is disposed toward the lower surface side across a non-magnetic ferrite layer.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: September 8, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Takako Sato
  • Publication number: 20150053467
    Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.
    Type: Application
    Filed: October 29, 2014
    Publication date: February 26, 2015
    Inventors: Shigetoshi Hayashi, Tomoya Yokoyama, Takako Sato
  • Publication number: 20150022307
    Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.
    Type: Application
    Filed: October 3, 2014
    Publication date: January 22, 2015
    Inventors: Tomoya Yokoyama, Takako Sato
  • Patent number: 8810352
    Abstract: In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.
    Type: Grant
    Filed: July 31, 2013
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Tomoya Yokoyama, Takako Sato, Akihiro Ieda, Shigetoshi Hayashi, Hirokazu Yazaki
  • Patent number: 8756775
    Abstract: A method is provided for efficiently and securely smoothing a surface of an electrode disposed on a base, such as a ceramic substrate, without damaging the electrode or the base. The electrode is fired by a non-shrinkage process using a constraining layer and is separated from the constraining layer. The base including the electrode disposed thereon is prepared and a surface of the electrode is smoothed by vibrating media such that the media are arranged to be in contact with the electrode.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: June 24, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akiyoshi Kawamura, Takako Sato, Osamu Chikagawa
  • Publication number: 20130314194
    Abstract: A laminated inductor element is configured to prevent warpage of the entire element with a structure in which a non-magnetic ferrite layer on an upper surface side is reduced in thickness to achieve a reduction in height of the entire element, a non-magnetic ferrite layer on a lower surface side is increased in thickness to be thicker than the non-magnetic ferrite layer so as to prevent a metal component diffused from a magnetic ferrite layer from coming into electrical contact with a land electrode of a mounting substrate, and an inductor is disposed toward the lower surface side across a non-magnetic ferrite layer.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventor: Takako SATO
  • Publication number: 20130314190
    Abstract: In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.
    Type: Application
    Filed: July 31, 2013
    Publication date: November 28, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Tomoya YOKOYAMA, Takako SATO, Akihiro IEDA, Shigetoshi HAYASHI, Hirokazu YAZAKI
  • Publication number: 20130293216
    Abstract: A laminated inductor element includes a laminated substrate including a plurality of layers including a magnetic layer, an inductor including coil conductors provided between layers of the laminated substrate and connected in a lamination direction of the laminated substrate, and a pair of non-magnetic layers laminated on the laminated substrate so as to sandwich the laminated substrate in the lamination direction. The non-magnetic layers include cover layers made of low temperature co-fired ceramics.
    Type: Application
    Filed: July 22, 2013
    Publication date: November 7, 2013
    Inventors: Tomoya YOKOYAMA, Takako SATO
  • Patent number: 8293358
    Abstract: When a ceramic substrate is manufactured through a constraint firing step that uses a constraining layer, the constraining layer is removed without causing significant damage to a sintered base layer or an electrode formed on the surface of the sintered base layer, and the electrode can be reliably exposed. A green stacked body having a base layer and a constraining layer disposed so as to be in contact with at least one principal surface of the base layer is formed. A fired stacked body having a sintered base layer and a green constraining layer is then obtained by firing the green stacked body to sinter the base layer. Subsequently, the constraining layer is removed from the sintered base layer by vibrating media that are disposed so as to be in contact with the constraining layer.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: October 23, 2012
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Akiyoshi Kawamura, Takako Sato, Osamu Chikagawa, Takaki Murata
  • Publication number: 20100304125
    Abstract: When a ceramic substrate is manufactured through a constraint firing step that uses a constraining layer, the constraining layer is removed without causing significant damage to a sintered base layer or an electrode formed on the surface of the sintered base layer, and the electrode can be reliably exposed. A green stacked body having a base layer and a constraining layer disposed so as to be in contact with at least one principal surface of the base layer is formed. A fired stacked body having a sintered base layer and a green constraining layer is then obtained by firing the green stacked body to sinter the base layer. Subsequently, the constraining layer is removed from the sintered base layer by vibrating media that are disposed so as to be in contact with the constraining layer.
    Type: Application
    Filed: August 10, 2010
    Publication date: December 2, 2010
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Akiyoshi KAWAMURA, Takako SATO, Osamu CHIKAGAWA, Takaki MURATA