Patents by Inventor Takako Sato
Takako Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250090959Abstract: A seat system includes a seat including a sensor configured to acquire information for detection of a motion of an occupant seated on a seat body, a terminal device configured to acquire the information from the sensor, and a server capable of communicating with the terminal device. The terminal device executes a game using the sensor based on the information, and acquires an execution result corresponding to the occupant for a game played by the occupant. The server generates integrated data by integrating execution results of the game acquired from another terminal device, and computes a reference value for execution results of the game based on the integrated data. The terminal device or the server assigns a difficulty level of the game for the terminal device based on the execution result corresponding to the occupant and the reference value. The terminal device reflects the difficulty level on the game.Type: ApplicationFiled: November 25, 2024Publication date: March 20, 2025Inventors: Hiroyuki KAKU, Hiroyuki NUMAJIRI, Takako MIYOSHI, Munetaka KOWA, Atsushi KUSANO, Ryuichiro HIROSE, Yoshikazu ITO, Yosuke HIGASHI, Satoshi SUZUKI, Ryosuke SATO, Satoru KANEDA
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Publication number: 20250047067Abstract: A surface-emitting laser element includes a translucent substrate, a back surface of which is light emission surface, an air-hole layer that is a photonic crystal layer, and a light reflection layer including a reflection surface. The air-hole layer has a diffraction surface which has a weakening region where a separation distance between the diffraction surface and the reflection surface is provided such that a light intensity of interference light generated by interference of first diffracted light and second diffracted light is lower than a light intensity of the first diffracted light is provided, and a strengthening region where a separation distance between the diffraction surface and the reflection surface is provided such that the light intensity of the interference light is higher than the light intensity of the first diffracted light is provided.Type: ApplicationFiled: March 14, 2023Publication date: February 6, 2025Applicants: KYOTO UNIVERSITY, STANLEY ELECTRIC CO., LTD.Inventors: Susumu NODA, Takuya INOUE, Kazuki SATO, Takako FUJIWARA, Kei EMOTO, Tomoaki KOIZUMI
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Patent number: 12213788Abstract: Provided are a seat system and a computer program product by which an occupant seated on a seat can grasp his/her own reflexes or the like. The seat system includes a seat which includes a seat body, and a sensor configured to acquire information for use in detecting motion of an occupant seated on the seat body, and a terminal configured to acquire the information from the sensor. The terminal outputs an instruction to prompt the occupant to make a predetermined motion, makes a determination based on the information acquired from the sensor as to whether or not the occupant has made the predetermined motion, and notifies the occupant of a response time elapsed between outputting the instruction and making the predetermined motion, and/or a performance level evaluated based on the response time.Type: GrantFiled: January 14, 2020Date of Patent: February 4, 2025Assignee: TS TECH CO., LTD.Inventors: Hiroyuki Kaku, Takako Miyoshi, Ryosuke Sato, Yoshikazu Ito, Satoshi Suzuki, Munetaka Kowa
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Publication number: 20230318334Abstract: A control apparatus controls a charging device that is connected to a secondary battery having a negative electrode which is a mixture of graphite and silicon monoxide and supplies a current to the secondary battery, wherein when a calculated SOC (State of Charge) of the secondary battery is less than 15%, a magnitude of the current supplied to the secondary battery by the charging device is controlled to a first value, and when the calculated SOC of the secondary battery is equal to or more than 15%, the magnitude of the current supplied to the secondary battery by the charging device is controlled to a second value that is larger than the first value.Type: ApplicationFiled: March 24, 2023Publication date: October 5, 2023Inventors: Takako Sato, Hirotaka Nakagawa, Sae Shinjo, Atsushi Tamai, Hanzhi Yang, Junji Kuwabara, Yusuke Kawano, Masafumi Shiwa, Yurika Nishimoto
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Publication number: 20220046793Abstract: A multilayer resin substrate includes insulating resin base material layers, and conductor patterns on at least one of the insulating resin base material layers. The conductor patterns include a ground conductor on a main surface of the insulating resin base material layers and extend into a frame shape or a planar shape, and the ground conductor includes openings. An aperture ratio of the openings in an outer peripheral portion of the ground conductor is less than an aperture ratio of the openings in an inner peripheral portion of the ground conductor.Type: ApplicationFiled: October 21, 2021Publication date: February 10, 2022Inventors: Takako SATO, Hiroki MAEGAWA
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Patent number: 11064606Abstract: A multilayer substrate includes a stacked body including a plurality of insulating base material layers stacked on each other and a plurality of conductor patterns provided in contact with the plurality of insulating base material layers. The stacked body includes a first surface, and the plurality of conductor patterns include a plurality of mounting electrodes. The plurality of mounting electrodes include first openings. The first openings, in a plan view of a mounting surface, are provided over a mounting region and a non-mounting region of the mounting electrodes. The mounting region, when a mounted component is mounted, overlaps with the mounted component, and the non-mounting region does not overlap with the mounted component.Type: GrantFiled: June 17, 2020Date of Patent: July 13, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Takako Sato
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Patent number: 10980112Abstract: A multilayer wiring board includes first and second insulating layers, a first conductive wiring layer on the first insulating layer, a second conductive wiring layer on a surface of the second insulating layer facing the first insulating layer, an interlayer connection conductor including an intermetallic compound and penetrating through the first insulating layer to interconnect the first and second conductive wiring layers, a first intermetallic compound layer between the first conductive wiring layer and the interlayer connection conductor, and a second intermetallic compound layer between the second conductive wiring layer and the interlayer connection conductor, wherein the intermetallic compounds in the first and second intermetallic compound layers have a composition different from that of the intermetallic compound in the interlayer connection conductor, and the first intermetallic compound layer is located at a level different from a level of an interface between the first conductive wiring layer anType: GrantFiled: December 10, 2019Date of Patent: April 13, 2021Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takako Sato, Takeshi Osuga, Masanori Okamoto
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Publication number: 20200315010Abstract: A multilayer substrate includes a stacked body including a plurality of insulating base material layers stacked on each other and a plurality of conductor patterns provided in contact with the plurality of insulating base material layers. The stacked body includes a first surface, and the plurality of conductor patterns include a plurality of mounting electrodes. The plurality of mounting electrodes include first openings. The first openings, in a plan view of a mounting surface, are provided over a mounting region and a non-mounting region of the mounting electrodes. The mounting region, when a mounted component is mounted, overlaps with the mounted component, and the non-mounting region does not overlap with the mounted component.Type: ApplicationFiled: June 17, 2020Publication date: October 1, 2020Inventor: Takako SATO
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Publication number: 20200113050Abstract: A multilayer wiring board includes first and second insulating layers, a first conductive wiring layer on the first insulating layer, a second conductive wiring layer on a surface the second insulating layer facing the first insulating layer, an interlayer connection conductor including an intermetallic compound and penetrating through the first insulating layer to interconnect the first and second conductive wiring layers, a first intermetallic compound layer between the first conductive wiring layer and the interlayer connection conductor, and a second intermetallic compound layer between the second conductive wiring layer and the interlayer connection conductor, wherein the intermetallic compounds in the first and second intermetallic compound layers have a composition different from that of the intermetallic compound in the interlayer connection conductor, and the first intermetallic compound layer at a level different from a level of an interface between the first conductive wiring layer and the first inType: ApplicationFiled: December 10, 2019Publication date: April 9, 2020Inventors: Takako SATO, Takeshi OSUGA, Masanori OKAMOTO
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Patent number: 9424981Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.Type: GrantFiled: October 3, 2014Date of Patent: August 23, 2016Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Tomoya Yokoyama, Takako Sato
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Patent number: 9204545Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.Type: GrantFiled: October 29, 2014Date of Patent: December 1, 2015Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Shigetoshi Hayashi, Tomoya Yokoyama, Takako Sato
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Patent number: 9129733Abstract: A laminated inductor element is configured to prevent warpage of the entire element with a structure in which a non-magnetic ferrite layer on an upper surface side is reduced in thickness to achieve a reduction in height of the entire element, a non-magnetic ferrite layer on a lower surface side is increased in thickness to be thicker than the non-magnetic ferrite layer so as to prevent a metal component diffused from a magnetic ferrite layer from coming into electrical contact with a land electrode of a mounting substrate, and an inductor is disposed toward the lower surface side across a non-magnetic ferrite layer.Type: GrantFiled: July 31, 2013Date of Patent: September 8, 2015Assignee: Murata Manufacturing Co., Ltd.Inventor: Takako Sato
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Publication number: 20150053467Abstract: Provided is a multilayer substrate that can prevent generation of cracks caused by stress generated due to a difference between the coefficient of linear expansion of electrode pads and that of a ceramic material. An electrode pad arranged on a layer below an outermost component mounting electrode pad has a larger area than an area of the component mounting electrode pad. Similarly, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad, and an electrode pad arranged on a layer below a component mounting electrode pad has a larger area than an area of the component mounting electrode pad.Type: ApplicationFiled: October 29, 2014Publication date: February 26, 2015Inventors: Shigetoshi Hayashi, Tomoya Yokoyama, Takako Sato
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Publication number: 20150022307Abstract: A multilayer body 12 includes nonmagnetic sheets SH1a and SH1b each having an upper surface provided with a plurality of linear conductors 16, a magnetic sheet SH3 having an upper surface provided with a plurality of linear conductors 18a, and a nonmagnetic sheet SH4 having an upper surface provided with a plurality of linear conductors 18b, which are stacked one on top of another. Via-hole conductors or side-surface conductors are disposed with the multilayer body 12 so as to connect these linear conductors to one another and form an inductor. The plurality of linear conductors have a pattern that is common among at least two sheets adjacent to each other in a stacking direction.Type: ApplicationFiled: October 3, 2014Publication date: January 22, 2015Inventors: Tomoya Yokoyama, Takako Sato
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Patent number: 8810352Abstract: In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.Type: GrantFiled: July 31, 2013Date of Patent: August 19, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Tomoya Yokoyama, Takako Sato, Akihiro Ieda, Shigetoshi Hayashi, Hirokazu Yazaki
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Patent number: 8756775Abstract: A method is provided for efficiently and securely smoothing a surface of an electrode disposed on a base, such as a ceramic substrate, without damaging the electrode or the base. The electrode is fired by a non-shrinkage process using a constraining layer and is separated from the constraining layer. The base including the electrode disposed thereon is prepared and a surface of the electrode is smoothed by vibrating media such that the media are arranged to be in contact with the electrode.Type: GrantFiled: August 26, 2009Date of Patent: June 24, 2014Assignee: Murata Manufacturing Co., Ltd.Inventors: Akiyoshi Kawamura, Takako Sato, Osamu Chikagawa
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Publication number: 20130314190Abstract: In a laminated inductor element, outer electrodes and terminal electrodes are electrically connected by via holes, internal wiring lines, and end surface electrodes. The via holes on an upper surface side are provided immediately under the outer electrodes and in a non-magnetic ferrite layer. The via holes on a lower surface side are provided immediately above the terminal electrodes and in a non-magnetic ferrite layer. Since outermost layers are defined by the non-magnetic ferrite layers, a parasitic inductance is not increased, even if the outermost layers are provided with the via holes. In this case, the internal wiring lines are not routed on a surface of the element. Therefore, there is no complication of a wiring pattern, and it is possible to prevent an increase in a mounting area of the element.Type: ApplicationFiled: July 31, 2013Publication date: November 28, 2013Applicant: Murata Manufacturing Co., Ltd.Inventors: Tomoya YOKOYAMA, Takako SATO, Akihiro IEDA, Shigetoshi HAYASHI, Hirokazu YAZAKI
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Publication number: 20130314194Abstract: A laminated inductor element is configured to prevent warpage of the entire element with a structure in which a non-magnetic ferrite layer on an upper surface side is reduced in thickness to achieve a reduction in height of the entire element, a non-magnetic ferrite layer on a lower surface side is increased in thickness to be thicker than the non-magnetic ferrite layer so as to prevent a metal component diffused from a magnetic ferrite layer from coming into electrical contact with a land electrode of a mounting substrate, and an inductor is disposed toward the lower surface side across a non-magnetic ferrite layer.Type: ApplicationFiled: July 31, 2013Publication date: November 28, 2013Applicant: Murata Manufacturing Co., Ltd.Inventor: Takako SATO
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Publication number: 20130293216Abstract: A laminated inductor element includes a laminated substrate including a plurality of layers including a magnetic layer, an inductor including coil conductors provided between layers of the laminated substrate and connected in a lamination direction of the laminated substrate, and a pair of non-magnetic layers laminated on the laminated substrate so as to sandwich the laminated substrate in the lamination direction. The non-magnetic layers include cover layers made of low temperature co-fired ceramics.Type: ApplicationFiled: July 22, 2013Publication date: November 7, 2013Inventors: Tomoya YOKOYAMA, Takako SATO
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Patent number: 8293358Abstract: When a ceramic substrate is manufactured through a constraint firing step that uses a constraining layer, the constraining layer is removed without causing significant damage to a sintered base layer or an electrode formed on the surface of the sintered base layer, and the electrode can be reliably exposed. A green stacked body having a base layer and a constraining layer disposed so as to be in contact with at least one principal surface of the base layer is formed. A fired stacked body having a sintered base layer and a green constraining layer is then obtained by firing the green stacked body to sinter the base layer. Subsequently, the constraining layer is removed from the sintered base layer by vibrating media that are disposed so as to be in contact with the constraining layer.Type: GrantFiled: August 10, 2010Date of Patent: October 23, 2012Assignee: Murata Manufacturing Co., Ltd.Inventors: Akiyoshi Kawamura, Takako Sato, Osamu Chikagawa, Takaki Murata