Patents by Inventor Takakuni Kuki

Takakuni Kuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5652752
    Abstract: In a mobile radio communication system employing a time-division multiple transmission scheme, having a plurality of base stations and a plurality of personal stations, an arbitrary base station, when detecting a pilot signal transmitted from any master base station in the mobile radio communication system, acts as a slave base station which does not transmit its pilot signal but transmits and receives a common control signal to and from a personal station utilizing a frequency channel occupied by the pilot signal. On the other hand, when not receiving the pilot signal, the base station searches for an available frequency channel, and acts as a master base station which transmits its pilot signal on the available frequency channel to occupy the frequency channel, and transmits and receives the common control signal to and from a personal station on that frequency channel.
    Type: Grant
    Filed: March 20, 1995
    Date of Patent: July 29, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Toshiro Suzuki, Arata Nakagoshi, Takao Harakawa, Izumi Horikawa, Takakuni Kuki
  • Patent number: 4502141
    Abstract: For use in deciding whether a single or a t-tuple error (t being greater than unity) is present in each bit sequence given as a primitive BCH code in accordance with a generator polynomial comprising a primitive and a non-primitive polynomial, an error checking circuit comprises first and second dividers (16, 17) for dividing each bit sequence by the primitive and the non-primitive polynomials to provide first and second signals, respectively. If the bit sequence includes only a single error, the first signal represents one of non-zero residues which result by the division when such single errors are present at the respective bit locations of the sequence. A memory (18) is preliminarily loaded with reference numbers corresponding to the respective non-zero residues and produces one of the reference numbers in response to the first signal only in the presence of a single error. A comparator (19) compares the produced reference number with a residue represented by the second signal to carry out the decision.
    Type: Grant
    Filed: September 8, 1982
    Date of Patent: February 26, 1985
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Takakuni Kuki
  • Patent number: 4356481
    Abstract: A voltage drop detection circuit provides an accurate indication of battery voltage in an apparatus subject to large fluctuations in load current regardless of the battery internal resistance. The detection circuit periodically induces an increase in load current so as to reproduce the maximum load current drawn by the apparatus, and the resulting battery terminal voltage is compared to a fixed reference. The detection circuit finds particular utility in apparatus designed to use a variety of battery types.
    Type: Grant
    Filed: April 9, 1980
    Date of Patent: October 26, 1982
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Takakuni Kuki
  • Patent number: 4167701
    Abstract: An error correcting decoder is disclosed which blocks correction of bits received during periods of relatively high signal intensity levels. A syndrome register and decision circuit provide error correcting bits for all bits which the sequence of input data determines to be in error. But only those data bits which occur during low levels of signal intensity are corrected.
    Type: Grant
    Filed: October 25, 1977
    Date of Patent: September 11, 1979
    Assignee: Nippon Electric Company, Ltd.
    Inventors: Takakuni Kuki, Hiroyuki Tatsumi