Patents by Inventor Takakuni Nasu

Takakuni Nasu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220108943
    Abstract: A multilayer wiring substrate includes a first wiring substrate including a plurality of stacked layers made of a thermosetting resin and having a wiring layer formed between each adjacent layers of the layers in a state in contact with the adjacent layers; a second wiring substrate made of a ceramic; and a joining layer disposed between a back surface of the first wiring substrate and a front surface of the second wiring substrate and configured to join the first wiring substrate and the second wiring substrate to each other. At least a surface of the joining layer adjacent to the second wiring substrate is made of a thermoplastic resin.
    Type: Application
    Filed: May 22, 2020
    Publication date: April 7, 2022
    Inventors: Hirohito HASHIMOTO, Takakuni NASU, Fumio SHIRAKI, Guangzhu JIN
  • Patent number: 10887991
    Abstract: A wiring substrate for inspection apparatus includes a base substrate and a plurality of tile substrates. The tile substrate is composed of a ceramic substrate section and a first resin substrate section. Each ceramic substrate section is composed of a plurality of ceramic layers and has a plurality of upper-surface connection terminals provided on an upper surface thereof, a plurality of lower-surface connection terminals provided on a lower surface thereof, and a plurality of through conductors for conducting electricity between the upper-surface connection terminals and the lower-surface connection terminals. The first resin substrate section is laminated on the upper surface and includes a laminate of a plurality of resin layers, a plurality of probe pads formed on a resin front-surface thereof, a plurality of inner wiring layers formed between the resin layers, and a plurality of electrically conductive paths for conducting electricity between the probe pads and the upper-surface connection terminals.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: January 5, 2021
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Takakuni Nasu
  • Patent number: 10834818
    Abstract: A wiring board includes: an insulator layer composed mainly of ceramic; a conductor extending through the insulator layer in a thickness direction thereof; and an electrode pad disposed on a first surface of the insulator layer and connected electrically with the conductor, wherein: the electrode pad includes through holes extending through the electrode pad in a thickness direction thereof; and each of the through holes is positioned to avoid overlapping with the conductor in the thickness direction of the insulator layer.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: November 10, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Kengo Tanimori, Yousuke Kondo, Masahiro Kamegai, Kouta Kimata, Junya Matsura, Fumio Shiraki, Guangzhu Jin
  • Patent number: 10834812
    Abstract: A wiring board includes: a ceramic board including a ceramic insulator layer composed mainly of ceramic, and a wiring disposed at the ceramic insulator layer; a first resin board and a second resin board each of which includes a resin insulator layer composed mainly of resin, and a wiring disposed at the resin insulator layer; and a metal member mounted to the second resin board. The first resin board is superposed to a first surface of the ceramic board. The second resin board is superposed to a second surface of the ceramic board opposite to the first surface of the ceramic board. The second resin board includes a joint pad at its first surface opposite to its second surface facing the ceramic board, the joint pad made of metal. The metal member is joined to the joint pad by brazing or soldering.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: November 10, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Yousuke Kondou, Masaomi Hattori, Kouta Kimata, Atsushi Kaga, Guangzhu Jin
  • Patent number: 10729006
    Abstract: [Objective] To provide a wiring substrate for electronic component inspection apparatus which includes a first laminate of resin layers with a plurality of pads for probe provided on its front surface and a second laminate of ceramic layers disposed on the back side of the first laminate and which, despite joining by brazing of a plurality of studs to the back surface of the second laminate, is free from deformation of resin of the first laminate caused by softening or the like and from accidental formation of a short circuit between brazing material layers used for the brazing and external connection terminals formed on the back surface of the second laminate.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 28, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Yousuke Kondo, Kouta Kimata, Guangzhu Jin
  • Patent number: 10674614
    Abstract: A wiring substrate for electronic component inspection apparatus includes a first laminate which is formed by stacking a plurality of ceramic layers and which has a front surface and a back surface, and a plurality of studs joined to the back surface of the first laminate Each of the studs is composed of a flange portion which is circular in bottom view, and a bolt portion which perpendicularly extends from a center portion of an outside surface of the flange portion. The flange portion has a truncated conical shape and the outside surface from which the bolt portion protrudes, such that the outside surface slopes from the proximal end side of the bolt portion toward the peripheral edge of the flange portion and gradually approaches the inside surface of the flange portion.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: June 2, 2020
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Masaomi Hattori
  • Publication number: 20200146146
    Abstract: A wiring board includes: an insulator layer composed mainly of ceramic; a conductor extending through the insulator layer in a thickness direction thereof; and an electrode pad disposed on a first surface of the insulator layer and connected electrically with the conductor, wherein: the electrode pad includes through holes extending through the electrode pad in a thickness direction thereof; and each of the through holes is positioned to avoid overlapping with the conductor in the thickness direction of the insulator layer.
    Type: Application
    Filed: September 27, 2019
    Publication date: May 7, 2020
    Inventors: Takakuni NASU, Kengo TANIMORI, Yousuke KONDO, Masahiro KAMEGAI, Kouta KIMATA, Junya MATSURA, Fumio SHIRAKI, Guangzhu JIN
  • Publication number: 20200077512
    Abstract: A wiring board includes: a ceramic board including a ceramic insulator layer composed mainly of ceramic, and a wiring disposed at the ceramic insulator layer; a first resin board and a second resin board each of which includes a resin insulator layer composed mainly of resin, and a wiring disposed at the resin insulator layer; and a metal member mounted to the second resin board. The first resin board is superposed to a first surface of the ceramic board. The second resin board is superposed to a second surface of the ceramic board opposite to the first surface of the ceramic board. The second resin board includes a joint pad at its first surface opposite to its second surface facing the ceramic board, the joint pad made of metal. The metal member is joined to the joint pad by brazing or soldering.
    Type: Application
    Filed: July 26, 2019
    Publication date: March 5, 2020
    Inventors: Takakuni NASU, Yousuke KONDOU, Masaomi HATTORI, Kouta KIMATA, Atsushi KAGA, Guangzhu JIN
  • Patent number: 10433433
    Abstract: A wiring substrate for electronic component inspection apparatus includes a first laminate which is formed by stacking a plurality of ceramic layers and which has a front surface and a back surface, and a plurality of studs joined to the back surface of the first laminate, wherein each of the studs is composed of a flange portion which is circular in bottom view, and a bolt portion which perpendicularly extends from a center portion of an outside surface of the flange portion; and in a vertical cross section along an axial direction of the bolt portion, the outside surface from which the bolt portion protrudes has a curved surface which is convex toward an inside surface of the flange portion facing the back surface of the first laminate.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: October 1, 2019
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Takakuni Nasu
  • Publication number: 20190261514
    Abstract: A wiring substrate for inspection apparatus includes a base substrate and a plurality of tile substrates. The tile substrate is composed of a ceramic substrate section and a first resin substrate section. Each ceramic substrate section is composed of a plurality of ceramic layers and has a plurality of upper-surface connection terminals provided on an upper surface thereof, a plurality of lower-surface connection terminals provided on a lower surface thereof, and a plurality of through conductors for conducting electricity between the upper-surface connection terminals and the lower-surface connection terminals. The first resin substrate section is laminated on the upper surface and includes a laminate of a plurality of resin layers, a plurality of probe pads formed on a resin front-surface thereof, a plurality of inner wiring layers formed between the resin layers, and a plurality of electrically conductive paths for conducting electricity between the probe pads and the upper-surface connection terminals.
    Type: Application
    Filed: February 8, 2019
    Publication date: August 22, 2019
    Inventor: Takakuni NASU
  • Publication number: 20190098770
    Abstract: A wiring substrate for electronic component inspection apparatus includes a first laminate which is formed by stacking a plurality of ceramic layers and which has a front surface and a back surface, and a plurality of studs joined to the back surface of the first laminate, wherein each of the studs is composed of a flange portion which is circular in bottom view, and a bolt portion which perpendicularly extends from a center portion of an outside surface of the flange portion; and in a vertical cross section along an axial direction of the bolt portion, the outside surface from which the bolt portion protrudes has a curved surface which is convex toward an inside surface of the flange portion facing the back surface of the first laminate.
    Type: Application
    Filed: September 27, 2018
    Publication date: March 28, 2019
    Inventor: Takakuni NASU
  • Publication number: 20190098769
    Abstract: A wiring substrate for electronic component inspection apparatus includes a first laminate which is formed by stacking a plurality of ceramic layers and which has a front surface and a back surface, and a plurality of studs joined to the back surface of the first laminate, wherein each of the studs is composed of a flange portion which is circular in bottom view, and a bolt portion which perpendicularly extends from a center portion of an outside surface of the flange portion; and the flange portion has a truncated conical shape and the outside surface from which the bolt portion protrudes, such that the outside surface slopes from the proximal end side of the bolt portion toward the peripheral edge of the flange portion and gradually approaches the inside surface of the flange portion.
    Type: Application
    Filed: September 27, 2018
    Publication date: March 28, 2019
    Inventors: Takakuni NASU, Masaomi HATTORI
  • Publication number: 20190082531
    Abstract: [Objective] To provide a wiring substrate for electronic component inspection apparatus which includes a first laminate of resin layers with a plurality of pads for probe provided on its front surface and a second laminate of ceramic layers disposed on the back side of the first laminate and which, despite joining by brazing of a plurality of studs to the back surface of the second laminate, is free from deformation of resin of the first laminate caused by softening or the like and from accidental formation of a short circuit between brazing material layers used for the brazing and external connection terminals formed on the back surface of the second laminate.
    Type: Application
    Filed: September 10, 2018
    Publication date: March 14, 2019
    Inventors: Takakuni NASU, Yousuke KONDO, Kouta KIMATA, Guangzhu JIN
  • Patent number: 9903887
    Abstract: Disclosed is a wiring board for simultaneously testing of multiple semiconductor devices. The wiring board includes a multilayer ceramic substrate, an organic wiring structure arranged on the multilayer ceramic substrate, a plurality of capacitor connection pads formed on the organic wiring structure and a plurality of test pads formed on the organic wiring structure. The organic wiring structure has a plurality of inner conductor layers including first and second plane layers. Each of the first plane layers is divided in a plurality of regions. Each of the second plane layer(s) is placed in a different layer from the first plane layers and made larger in area than the first plane layers. At least a part of the test pads of each test pad group is electrically connected to at least a part of the connection pads via an outermost one of the first plane layers.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: February 27, 2018
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Takakuni Nasu, Kengo Tanimori, Kouta Kimata, Guangzhu Jin
  • Publication number: 20170122981
    Abstract: Disclosed is a wiring board for simultaneously testing of multiple semiconductor devices. The wiring board includes a multilayer ceramic substrate, an organic wiring structure arranged on the multilayer ceramic substrate, a plurality of capacitor connection pads formed on the organic wiring structure and a plurality of test pads formed on the organic wiring structure. The organic wiring structure has a plurality of inner conductor layers including first and second plane layers. Each of the first plane layers is divided in a plurality of regions. Each of the second plane layer(s) is placed in a different layer from the first plane layers and made larger in area than the first plane layers. At least a part of the test pads of each test pad group is electrically connected to at least a part of the connection pads via an outermost one of the first plane layers.
    Type: Application
    Filed: November 1, 2016
    Publication date: May 4, 2017
    Inventors: Takakuni NASU, Kengo TANIMORI, Kouta KIMATA, Guangzhu JIN
  • Publication number: 20160099163
    Abstract: A method of making a semiconductor manufacturing equipment component, such as an electrostatic chuck, includes an application step of applying a photosensitive metal paste onto a ceramic green sheet, which is to become the body substrate, the photosensitive metal paste being a heating element material; an exposure-and-development step of exposing the photosensitive metal paste, which has been applied onto the ceramic green sheet, to light and developing the photosensitive metal paste to form an intermediate heating element, which is to become the heating element, on the ceramic green sheet; and a firing step of co-firing the ceramic green sheet and the intermediate heating element to form the body substrate and the heating element.
    Type: Application
    Filed: September 30, 2015
    Publication date: April 7, 2016
    Inventors: Takakuni NASU, Tomonori NIWA, Taichi KIBE
  • Patent number: 9107334
    Abstract: A ceramic substrate includes: a substrate body formed by laminating a plurality of ceramic layers and including a first and second opposing principal surfaces and a peripheral portion having a positioning portion; a first conductor pad formed on the first principal surface; a second conductor pad formed on the second principal surface and having a diameter smaller than that of the first conductor pad. The positioning portion includes first and second through holes that individually pass through respective ceramic layers and are connected to each other in an axial direction. The first through hole passes through the first principal surface. The second through hole passes through the second principal surface and has a cross-sectional area that is smaller than that of the first through hole. At least apart of a peripheral edge of a ceramic layer defining the second through hole is visible through the first through hole.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: August 11, 2015
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventors: Kenji Suzuki, Yuma Otsuka, Takakuni Nasu
  • Publication number: 20090051041
    Abstract: A multilayer wiring substrate includes one or more resin dielectric layers (81), conductor layers (84), via conductors (91), and projecting portions (85). The one or more resin dielectric layers (81) individually having via holes (90) formed therein and extending through a first surface (82) and a second surface (83). The conductor layers (84) are formed from a conductive metal material and disposed on the first surface (82) of the one or more resin dielectric layers (81). The via conductors (91) are disposed in the respective via holes (90) and electrically connected to respective conductor layers (84). The projecting portions (85) are bent toward the main surface (72) or the back surface (73) of the multilayer wiring substrate, project from opening edges of respective via holes (90) toward center axes thereof, and penetrate into the respective via conductors (91).
    Type: Application
    Filed: August 20, 2008
    Publication date: February 26, 2009
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Yuma Otsuka, Takakuni Nasu, Masanori Kito
  • Publication number: 20030003862
    Abstract: An electronic part or component for use in a mobile communication apparatus is mounted with improved joining strength to a printed substrate. The electronic part is formed by laminating first and second insulator substrates. An auxiliary electrode is arranged in a portion of a laminating layer face on one side of the second insulator substrate in a part of that laminating layer face which does not overlap the corresponding laminating layer face of the first insulator substrate.
    Type: Application
    Filed: May 31, 2002
    Publication date: January 2, 2003
    Inventors: Yoshitaka Yoshida, Takakuni Nasu, Daisuke Kato, Tomoaki Sakurai, Hajime Yoshikawa