Patents by Inventor Takamasa Jinbo

Takamasa Jinbo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4893404
    Abstract: A method for producing a multilayer printed wiring board by the buildup process. A first layer printed wiring pattern (13) is formed on a metal core (11) over a first insulating laminate (12), and second layer printed wiring pattern (16) is formed on the first layer printed wiring pattern over through studs (15) and a second insulating laminate (14). The surface of the first layer printed wiring pattern (13) is roughened and the through studs (15) are formed by the buildup process using a conductive paste on the roughened surface.
    Type: Grant
    Filed: September 13, 1988
    Date of Patent: January 16, 1990
    Assignee: Furukawa Denki Kogyo Kabushiki Kaisha
    Inventors: Isao Shirahata, Shoji Shiga, Hisako Hori, Takamasa Jinbo
  • Patent number: 4791239
    Abstract: A multilayer printed wiring board produced by the buildup process. A first layer printed wiring pattern (13) is formed on a metal core (11) through a first insulation laminate (12), and a second layer printed wiring pattern (16) is formed on the first layer printed wiring pattern through through studs (15) and a second insulation laminate (14). The surface of the first layer printed wiring pattern (13) is roughened and the through studs (15) are formed by the buildup process using a conductive paste on the roughened surface.
    Type: Grant
    Filed: May 29, 1987
    Date of Patent: December 13, 1988
    Assignee: Furukawa Denki Kogyo Kabushiki Kaisha
    Inventors: Isao Shirahata, Shoji Shiga, Hisako Hori, Takamasa Jinbo