Abstract: An image pickup element includes a plurality of read signal lines; a pixel unit in which a plurality of pixel circuits are arranged in a matrix form, the plurality of pixel circuits in the pixel unit being divided into groups of pixel circuits so that each of the groups is provided in a corresponding one of columns, each of the groups of pixel circuits being connected to a corresponding one of the plurality of read signal lines; and a processing unit configured to process read signals that the plurality of pixel circuits, which are divided into groups, output to the plurality of read signal lines, which are connected to the plurality of pixel circuits.

Abstract: An image pickup element includes a plurality of read signal lines; a pixel unit in which a plurality of pixel circuits are arranged in a matrix form, the plurality of pixel circuits in the pixel unit being divided into groups of pixel circuits so that each of the groups is provided in a corresponding one of columns, each of the groups of pixel circuits being connected to a corresponding one of the plurality of read signal lines; and a processing unit configured to process read signals that the plurality of pixel circuits, which are divided into groups, output to the plurality of read signal lines, which are connected to the plurality of pixel circuits.

Abstract: When pixel signals are separately read from a plurality of horizontal signal lines to achieve high-speed processing, color difference in image signals and stripes are eliminated. In the operation of reading the pixel signals from the (2n)th row, the pixel signals from R pixels on odd columns are output to an output system A through a horizontal signal line (60A). On the other hand, the pixel signals from Gr pixels on even columns are output to an output system B through a horizontal signal line (60B). In the operation of reading the pixel signals from the (2n+1)th row, the pixel signals from Gb pixels on the odd columns are output to the output system B through the horizontal signal line (60B) by the switching operation in a switching circuit (50). Similarly, the pixel signals from B pixels on the even columns are output to the output system A through the horizontal signal line (60A) by the switching operation in the switching circuit (50).

Abstract: An image pickup element includes a plurality of read signal lines; a pixel unit in which a plurality of pixel circuits are arranged in a matrix form, the plurality of pixel circuits in the pixel unit being divided into groups of pixel circuits so that each of the groups is provided in a corresponding one of columns, each of the groups of pixel circuits being connected to a corresponding one of the plurality of read signal lines; and a processing unit configured to process read signals that the plurality of pixel circuits, which are divided into groups, output to the plurality of read signal lines, which are connected to the plurality of pixel circuits.

Abstract: A solid state imaging device having an X-Y addressable solid state imaging device with color filters and a driving unit which reads out pixel information of a same color filter in a unit pixel block as pixel information for one pixel simulatively. A predetermined color coding for the pixels has two rows and two columns. When k is a positive integer equal to or larger than 0, with (2k+3)×(2k+3) pixel blocks as unit pixel blocks, the driving unit reads out pieces of pixel information of the same color filter in each of the unit pixel blocks, the driving unit reads out pieces of pixel information of a same color filter in each of the unit pixel blocks simulatively as pixel information for one pixel in a state in which the unit pixel blocks are laid without overlapping one another, and the driving unit averages the added pieces of pixel information and outputs the averaged pieces of pixel information.

Abstract: A solid-state image capture apparatus includes a pixel array section with a plurality of pixels arranged in two-dimensional directions, each having a photoelectric conversion section, and pixel drive control section for performing pixel signal readout by sequentially scanning the pixel array section either in a row direction or in a column direction, and driving and controlling individual pixels of the pixel array section through a level shifter circuit. The pixel drive control means includes thinning-out readout control means for performing pixel signal readout, reset control means for resetting either a non-readout pixel row or a non-readout pixel column not being selected by the thinning-out readout control means and gate means for causing the pixel drive control means to perform driving control, whereby current concurrently flowing into the level shifter circuit during the thinning-out readout driving, may be avoided and large current caused by the level shifter circuit may be suppressed.

Abstract: When pixels are simply skipped while keeping both an order of pixel information and a spatial positional relation the same as those in all-pixel readout, since a distance between pixels to be read out increases, the Nyquist frequency decreases and aliasing noise increases. A 5×5 pixel block is set as a unit pixel block and pieces of pixel information in first, third, and fifth columns of first, third, and fifth rows of a pixel arrangement are added and outputted as an output in an ath row and an ath column of the unit pixel block. Then, pieces of pixel information in sixth, eighth, and tenth columns of the first, the third, and the fifth rows of the pixel arrangement are added and outputted as an output in the ath row and a bth column of the unit pixel block. Subsequently, pieces of pixel information are added and outputted up to a last column or a column near the last column.

Abstract: When pixel signals are separately read from a plurality of horizontal signal lines to achieve high-speed processing, color difference in image signals and stripes are eliminated. In the operation of reading the pixel signals from the (2n)th row, the pixel signals from R pixels on odd columns are output to an output system A through a horizontal signal line (60A). On the other hand, the pixel signals from Gr pixels on even columns are output to an output system B through a horizontal signal line (60B). In the operation of reading the pixel signals from the (2n+1)th row, the pixel signals from Gb pixels on the odd columns are output to the output system B through the horizontal signal line (60B) by the switching operation in a switching circuit (50). Similarly, the pixel signals from B pixels on the even columns are output to the output system A through the horizontal signal line (60A) by the switching operation in the switching circuit (50).