Patents by Inventor Takami Makino

Takami Makino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5438544
    Abstract: A non-volatile semiconductor memory device includes a control circuit provided for controlling erasure and writing of data with respect to memory cell transistors. In an erase operation, the control circuit generates a voltage which is required for bringing memory cell transistors to an overerased state. In a write operation, the control circuit sets respective voltages of each control gate of memory cell transistors to be an identical one, and generates a first voltage required for releasing memory cell transistors in an overerased state from the overerased state to thereby cause the memory cell transistors to present a first logic level. A second voltage is generated which is required for releasing memory cell transistors in an overerased state from the overerased state to thereby cause the memory cell transistors to present a second logic level.
    Type: Grant
    Filed: January 28, 1994
    Date of Patent: August 1, 1995
    Assignee: Fujitsu Limited
    Inventor: Takami Makino