Abstract: According to one embodiment, a data storage apparatus includes a read module, an error detector and a controller. The read module is configured to read data from a flash memory, more precisely from a rewrite area and a write-back area, both provided in the flash memory. The error detector is configured to detect errors, if any, in the data read. The controller is configured to keep rewriting data, without correcting the errors the error detector has detected in the rewrite area of the flash memory.

Abstract: According to one embodiment, a data storage apparatus includes a read module, an error detector and a controller. The read module is configured to read data from a flash memory, more precisely from a rewrite area and a write-back area, both provided in the flash memory. The error detector is configured to detect errors, if any, in the data read. The controller is configured to keep rewriting data, without correcting the errors the error detector has detected in the rewrite area of the flash memory.

Abstract: According to one embodiment, a storage control device includes a controller, a detector, and a refreshing module. The controller writes image data, which is to be output to a display module, to a storage device and outputs the image data from the storage device to the display module. The detector detects a blanking period during which the controller does not write the image data to the storage device and does not output the image data from the storage device to the display module. The refreshing module refreshes the storage device by rewriting the image data to the storage device at a predetermined time interval if the detector detects a blanking period.

Abstract: A terminal apparatus is provided with a memory, a communication section, an authentication section configured to execute authentication when a signal requesting access to the memory is received, a save processing section configured to save predetermined data of the memory in a predetermined storage section when the authentication section outputs a negative result, and an erasing section configured to erase the predetermined data from the memory after the predetermined data is saved.

Abstract: An apparatus includes a first direct memory access controller which successively processes first descriptors, thereby executing a series of data transfers for reading first data, which is stored in a memory, and generates an activation signal in a case where a current to-be-processed first descriptor of the first descriptors includes control information which instructs start of another data transfer, a second direct memory access controller which executes, each time the activation signal is received, a current to-be-processed second descriptor of second descriptors, thereby executing one of a series of data transfers for reading second data, which is stored in the memory, and an output signal generation unit that mixes the first data which is read by the first direct memory access controller and the second data which is read by the second direct memory access controller, thereby generating an output signal including the first data and the second data.

Abstract: Among plural types of signals sent/received between a computer (PC) and a extension unit (extension adapter), a predetermined signal group is converted to a serial data and delivered through a serial bus, and a specific signal directly affecting the operational-speed is directly delivered through a direct signal line so that the number of connection signals between the computer and the extension unit is reduced while keeping the operational-speed from lowering, a connector can be made smaller, and the device constitution of the entire system can be compact.

Abstract: A connection interface is provided in that, among plural types of signals sent/received between a computer (PC) and an extension unit (extension adapter), a predetermined signal group is converted to a serial data and delivered through a serial bus, and a specific signal group directly affecting the operational-speed is directly delivered through a direct signal line so that the number of connection signals between the computer and the extension unit is reduced with keeping the operational-speed from lowering, the size of a connector can be made smaller and the device constitution of the entire system can be made compact.