Patents by Inventor Takamichi Maeda
Takamichi Maeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5523608Abstract: A peripheral IC 6 for a solid state imaging device is mounted on an island 7 of a lead frame and thereafter covered and sealed by a molding resin, thus forming a premolded package 2. Subsequently, a solid state image sensor 1 is mounted on the island 7 on one side thereof facing an opening. Thereafter, for protection of the solid state image sensor 1, a transparent lid 11 is attached to the premolded package 2 by adhesive. As a result, packaging area can be reduced in mounting the solid state image sensor on a packaging substrate, allowing video equipment such as video cameras to be miniaturized.Type: GrantFiled: October 3, 1994Date of Patent: June 4, 1996Assignee: Sharp Kabushiki KaishaInventors: Kouki Kitaoka, Takamichi Maeda, Shozo Minamide
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Patent number: 5506444Abstract: In a semiconductor device of a tape carrier package type, the gap width between inner leads connected with a first edge side of a semiconductor chip set within a device mounting hole provided in the tape carrier is larger than the gap width between leads connected with a second edge side opposite to the first edge side of the semiconductor chip, and the gap length of device mounting hole between the first edge of the semiconductor chip and the first edge of the device mounting hole corresponding to the first edge of the semiconductor chip is smaller than the gap length between the second edge of the semiconductor chip and the second edge of the device mounting hole corresponding to the second edge of the semiconductor chip. Such structure enables an encapsulation resin to fill uniformly the device mounting hole, and the encapsulation resin after encapsulation has a shape of a designed dimension.Type: GrantFiled: March 15, 1994Date of Patent: April 9, 1996Assignee: Sharp Kabushiki KaishaInventors: Yasunori Chikawa, Yoshiaki Honda, Katsunobu Mori, Naoyuki Tajima, Takaaki Tsuda, Takamichi Maeda, Mitsuaki Osono
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Patent number: 5336650Abstract: A tape carrier semiconductor device has a resin sealed area not so larger than the size of the semiconductor chip, e.g. substantially not exceeding 2 mm to the outside. A device hole is not larger than an area formed by extending the outer periphery of the semiconductor chip to the outside by 0.3 mm and an epoxy resin of 500-1200 ps in viscosity is used for sealing the chip.Type: GrantFiled: August 27, 1993Date of Patent: August 9, 1994Assignee: Sharp Kabushiki KaishaInventors: Yasunori Chikawa, Yoshiaki Honda, Katsunobu Mori, Naoyuki Tajima, Takaaki Tsuda, Takamichi Maeda
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Patent number: 5310699Abstract: A method of manufacturing a semiconductor device with a bump-electrode of gold crystal is disclosed. The method includes providing a semiconductor substrate, an insulative layer, an electrode section, passivation layer on the edge portion of the electrode section, a multi-layer film, and a bump electrode of gold crystal. The method further includes heat treatment of the bump electrode to form an anticorrosive layer between the electrode section and the lower layer of the multi-layer film. Removing the unnecessary multi-layer film, the anticorrosive layer is used as a mask for etching to simplify the process of manufacturing the semiconductor device.Type: GrantFiled: June 29, 1992Date of Patent: May 10, 1994Assignee: Sharp Kabushiki KaishaInventors: Yasunori Chikawa, Shigeyuki Sasaki, Katsunobu Mori, Takamichi Maeda, Masao Hayakawa
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Patent number: 5281848Abstract: A tape carrier semiconductor device has a resin sealed area not much larger than the size of the semiconductor chip, e.g. substantially not exceeding 2 mm to the outside. A device hole is not larger than an area formed by extending the outer periphery of the semiconductor chip to the outside by 0.3 mm and an epoxy resin of 500-1200 ps in viscosity is used for sealing the chip.Type: GrantFiled: November 22, 1991Date of Patent: January 25, 1994Assignee: Sharp Kabushiki KaishaInventors: Yasunori Chikawa, Yoshiaki Honda, Katsunobu Mori, Naoyuki Tajima, Takaaki Tsuda, Takamichi Maeda
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Patent number: 5219608Abstract: A method of spraying release agent on a semiconductor chip molding die. The die has a pot for supplying resin to be molded, cavities in which semiconductor chips to be packaged are disposed, respectively, and a runner disposed between the pot and the cavities, for conducting the resin from the pot to the cavities. This method includes the steps of spraying at least the pot and the runner mentioned above with non-silicone release agent and selectively spraying only the cavities with silicone-based release agent.Type: GrantFiled: August 15, 1991Date of Patent: June 15, 1993Assignee: Sharp kabushiki KaishaInventors: Kazumasa Aoki, Kazuya Fujita, Hirofumi Uchida, Takaaki Tsuda, Takamichi Maeda
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Patent number: 5153705Abstract: A TAB package for packaging a semiconductor chip includes a flexible base plate having a first surface and a second surface opposite to the first surface, an input and output leads being formed on the second surface of the flexible base plate and capable of being connected to the semiconductor chip, and a plurality of slits being formed on the first surface of the flexible base plate. Accordingly, the TAB package is allowed to be easily bent and kept in the bending state. The slits are formed in a manner to correspond to the intervals between the adjacent input and output leads so that the input and output leads can be reliably supported by the flexible base plate.Type: GrantFiled: March 6, 1991Date of Patent: October 6, 1992Assignee: Sharp Kabushiki KaishaInventors: Kazuhiko Fukuta, Naoyuki Tajima, Yasunori Chikawa, Takaski Tsuda, Takamichi Maeda
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Patent number: 4993618Abstract: A wire bonding method for connecting a pad of a semiconductor chip and an inner lead with a bonding wire, which comprises the steps of pressing a ball formed on an end of the bonding wire to the pad, and applying ultrasonic waves to the ball, while the output of the ultrasonic waves is reduced after a predetermined period of time from the beginning of the step of pressing.Type: GrantFiled: July 27, 1989Date of Patent: February 19, 1991Assignee: Sharp Kabushiki KaishaInventors: Kenji Toyozawa, Takamichi Maeda
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Patent number: 4926239Abstract: A plastic encapsulant for a semiconductor chip comprises an epoxy resin, an organosilicon compound, a hardener, a pigment, and an organic solvent. The epoxy resin is an epichlorohydrin-bisphenol A type epoxy resin, and the organosilicon compound is an organosilicon compound with a methoxy group, preferably, three methoxy groups. The hardener is a resol type phenol resin hardener. The organic solvent is a mixture of ketones, alcohols, and aromatic hydrocarbons.Type: GrantFiled: August 2, 1989Date of Patent: May 15, 1990Assignee: Sharp Kabushiki KaishaInventors: Kazuya Fujita, Takamichi Maeda, Masao Hayakawa
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Patent number: 4536786Abstract: Raised contacts included within a semiconductor chip are bonded to respective external leads through the use of a bonding tool. The raised contacts and/or the external leads are varied in a fashion depending on their locations on a semiconductor substrate so as to compensate for lack of uniformity of the surface temperature of the bonding tool.Type: GrantFiled: May 17, 1979Date of Patent: August 20, 1985Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
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Patent number: 4383363Abstract: A conductive paste is disposed in a through hole to provide communication between wiring patterns formed on both of the major surfaces of an insulator substrate. Conductive layers integral with the wiring patterns are formed on the both major surfaces of the insulator substrate so that the conductive layers extend across the through hole. The conductive layers make contact with the conductive paste disposed in the through hole and function to enclose the both ends of the conductive paste.Type: GrantFiled: June 27, 1980Date of Patent: May 17, 1983Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Mituwo Oda
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Patent number: 4300153Abstract: Electrodes are formed on one major surface of a semiconductor chip and electrically connected to lead electrodes carried by a support substrate. A cover plate is fixed to the opposing major surface of the semiconductor chip to determine one major surface of semiconductor device. Remaining surfaces of the semiconductor chip are encapsulated by a resin mold. The cover plate comprises a flexible glass cloth impregnated with half cured epoxy resin.Type: GrantFiled: September 25, 1980Date of Patent: November 10, 1981Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
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Patent number: 4280132Abstract: Blocking members are provided for limiting mold spread over a desirable area while a semiconductor is molded. The blocking members are composed within a metallic layer together with metallic leads by photoetching techniques. The blocking members are positioned at four corners of an aperture in a predetermined pattern of generally radial fingers extending cantilever-wise inwardly beyond the periphery of the aperture. The semiconductor is adapted to engage bumps on the semiconductor to the metallic leads by wire bonding methods. Extended portions of the metallic leads may also function as the blocking members, with the metallic leads being positioned at the four corners of the aperture.Type: GrantFiled: October 15, 1979Date of Patent: July 21, 1981Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura
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Patent number: 4247590Abstract: A semiconductor wafer is supported by a supporting plate via adhesive in some steps of fabricating a semiconductor device. The supporting plate is a porous ceramic plate impregnated with or painted with resin such as epoxy resin, silicone resin and polyimide varnish. The porous ceramic supporting plate has a low thermal conductivity to ensure stable bonding operation.Type: GrantFiled: December 8, 1977Date of Patent: January 27, 1981Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Teruo Horii, Masao Kumura, Yasunori Chikawa
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Patent number: 4151543Abstract: A semiconductor device comprises an insulating substrate such as a film carrier having wiring patterns formed thereon, lead electrodes connected to the wiring patterns, and a semiconductor chip bonded to the lead electrodes. The surface of the lead electrodes, to which the semiconductor chip is bonded, is smooth as compared with that of the wiring patterns, thereby ensuring accurate operation of the semiconductor device.Type: GrantFiled: April 12, 1977Date of Patent: April 24, 1979Assignee: Sharp Kabushiki KaishaInventors: Masao Hayakawa, Takamichi Maeda, Masao Kumura