Abstract: The actuator includes a control unit configured to allow a first control capable of driving a drive part with a first driving force and a second control capable of driving the drive part with a second driving force which is stronger than the first driving force, a moving part configured to move in a predetermined direction, an elastic member configured to receive at least one of the first driving force and the second driving force from the drive part and to supply a force for the moving part to move to the moving part, and a detection unit configured to supply a detection signal for detecting a stop of the drive part to the control unit, in which the control unit performs the second control when a stop of the drive part is detected after performing the first control.

Abstract: A directional coupler is configured so as to include: a resistive element in which one end thereof is connected to a first terminal and the other end is connected to a second terminal; a first amplifier circuit for outputting either a current directly proportional to a first voltage applied to the one end of the resistive element or a current directly proportional to a second voltage applied to the other end of the resistive element; a second amplifier circuit for outputting a first current which is directly proportional to the voltage difference between the first voltage applied to the one end of the resistive element and the second voltage applied to the other end of the resistive element and whose polarity is different from that of the current outputted from the first amplifier circuit when a signal is flowing from the first terminal to the second terminal, and for outputting a second current which is directly proportional to the voltage difference between the first voltage and the second voltage and whose

Abstract: A mixer includes a first unit mixer, a second unit mixer, a third unit mixer, and a fourth unit mixer that have the same configuration and a first combiner, a second combiner, and a third combiner that have the same configuration. The first to the fourth unit mixers each include a differential RF signal terminal. Output of the first unit mixer and output of the second unit mixer are combined by the second combiner. Output of the third unit mixer and output of the fourth unit mixer are combined by the third combiner. Output of the second combiner and output of the third combiner are combined by the first combiner. The output of the third unit mixer is input to the third combiner with the polarity being determined.

Abstract: A mixer includes a first unit mixer, a second unit mixer, a third unit mixer, and a fourth unit mixer that have the same configuration and a first combiner, a second combiner, and a third combiner that have the same configuration. The first to the fourth unit mixers each include a differential RF signal terminal. Output of the first unit mixer and output of the second unit mixer are combined by the second combiner. Output of the third unit mixer and output of the fourth unit mixer are combined by the third combiner. Output of the second combiner and output of the third combiner are combined by the first combiner. The output of the third unit mixer is input to the third combiner with the polarity being determined.

Abstract: A directional coupler is configured so as to include: a resistive element in which one end thereof is connected to a first terminal and the other end is connected to a second terminal; a first amplifier circuit for outputting either a current directly proportional to a first voltage applied to the one end of the resistive element or a current directly proportional to a second voltage applied to the other end of the resistive element; a second amplifier circuit for outputting a first current which is directly proportional to the voltage difference between the first voltage applied to the one end of the resistive element and the second voltage applied to the other end of the resistive element and whose polarity is different from that of the current outputted from the first amplifier circuit when a signal is flowing from the first terminal to the second terminal, and for outputting a second current which is directly proportional to the voltage difference between the first voltage and the second voltage and whose

Abstract: An NMOS transistor performs electrical conduction or cut-off between a drain and a source by controlling a potential at a gate. A resistive element is connected between a back gate of the NMOS transistor and a high-frequency ground. A first switching circuit is disposed in parallel with the resistive element between the back gate and the high-frequency ground and causes a short circuit between the back gate and the high-frequency ground upon cut-off.

Abstract: An NMOS transistor performs electrical conduction or cut-off between a drain and a source by controlling a potential at a gate. A resistive element is connected between a back gate of the NMOS transistor and a high-frequency ground. A first switching circuit is disposed in parallel with the resistive element between the back gate and the high-frequency ground and causes a short circuit between the back gate and the high-frequency ground upon cut-off.

Abstract: A variable gain amplifier (1) includes: a signal transmission circuit (10, 20) including amplifying transistor units (111 to 11N, and 211 to 21N) connected in parallel between a signal input port (2P, 2N) and a signal output port (3P, 3N); a load circuit (40) connected between a supply line of power supply voltage (VDD) and an output end of the signal transmission circuit (10, 20); a signal short circuit (30) including a short-circuit transistor unit (31) connected between the supply line of the power supply voltage (VDD) and an input end of the signal transmission circuit (10, 20), a constant-current source circuit (42), and a transistor control circuit (46). The transistor control circuit (46) selects transistor units to be turned on, from among the amplifying transistor units (111 to 11N, and 211 to 21N) and the short-circuit transistor unit (31), and supplies control voltages for turning on the selected transistor units.

Abstract: There are provided: a table memory to store a relation between a control code and gains of variable gain amplifiers; a gain controller to apply the gains to the variable gain amplifiers; an amplitude phase detector to detect amplitude and a phase from an output signal of the vector sum phase shifter; an amplitude phase recorder to record, when the gains are applied by the gain controller, a combination of a control code corresponding to said gains and the amplitude and the phase detected by the detector; and a table calibrator to find a phase shift characteristic of a vector summed part from records of the amplitude phase recorder and calibrate the relation between a control code and gains recorded in the table memory by using the phase shift characteristic.

Abstract: Provided is a polyphase filter, which is capable of achieving amplitude matching and phase matching while achieving a low insertion loss with a single-stage configuration. A first variable resistor and a second variable resistor have resistance values that are equal to each other, and the resistance values are set so as to correct an amplitude error between orthogonal signals of outputs of a first output terminal to a fourth output terminal. A first variable capacitor, a second variable capacitor, a third variable capacitor, and a fourth variable capacitor have capacitance values that are equal to one another, and the capacitance values are set so as to correct a phase error between the orthogonal signals of the outputs of the first output terminal to the fourth output terminal.

Abstract: A variable gain amplifier (1) includes: a signal transmission circuit (10, 20) including amplifying transistor units (111 to 11N, and 211 to 21N) connected in parallel between a signal input port (2P, 2N) and a signal output port (3P, 3N); a load circuit (40) connected between a supply line of power supply voltage (VDD) and an output end of the signal transmission circuit (10, 20); a signal short circuit (30) including a short-circuit transistor unit (31) connected between the supply line of the power supply voltage (VDD) and an input end of the signal transmission circuit (10, 20), a constant-current source circuit (42), and a transistor control circuit (46). The transistor control circuit (46) selects transistor units to be turned on, from among the amplifying transistor units (111 to 11N, and 211 to 21N) and the short-circuit transistor unit (31), and supplies control voltages for turning on the selected transistor units.

Abstract: Provided is a polyphase filter, which is capable of achieving amplitude matching and phase matching while achieving a low insertion loss with a single-stage configuration. A first variable resistor and a second variable resistor have resistance values that are equal to each other, and the resistance values are set so as to correct an amplitude error between orthogonal signals of outputs of a first output terminal to a fourth output terminal. A first variable capacitor, a second variable capacitor, a third variable capacitor, and a fourth variable capacitor have capacitance values that are equal to one another, and the capacitance values are set so as to correct a phase error between the orthogonal signals of the outputs of the first output terminal to the fourth output terminal.

Abstract: There are provided: a table memory to store a relation between a control code and gains of variable gain amplifiers; a gain controller to apply the gains to the variable gain amplifiers; an amplitude phase detector to detect amplitude and a phase from an output signal of the vector sum phase shifter; an amplitude phase recorder to record, when the gains are applied by the gain controller, a combination of a control code corresponding to said gains and the amplitude and the phase detected by the detector; and a table calibrator to find a phase shift characteristic of a vector summed part from records of the amplitude phase recorder and calibrate the relation between a control code and gains recorded in the table memory by using the phase shift characteristic.

Abstract: A plurality of source-grounded transistors (3) are connected in parallel with each other, and a plurality of gate-grounded transistors (4) are connected in parallel with each other. Sources (4s) of the plurality of gate-grounded transistors (4) are connected to drains (3d) of the plurality of source-grounded transistors (3) respectively. Ground pads (5) are connected to sources (3s) of the plurality of source-grounded transistors (3). A plurality of grounding capacitances (6) are connected between gates (4g) of the plurality of gate-grounded transistors (4) and the ground pads (5). The plurality of source-grounded transistors (3) and the plurality of grounding capacitances (6) are alternately arranged between the ground pads (5) and the plurality of gate-grounded transistors (4).

Abstract: A frequency converter circuit includes a frequency conversion section for converting an inputted radio frequency voltage signal to a radio frequency current signal, converting the frequency of the signal to a low frequency current signal, and then outputting the low frequency current signal from an output section thereof; an amplifier including an input section connected to the output section of the frequency conversion section, and an input resistor for providing as an input impedance; and a capacitor wherein one terminal is connected to the input section of the amplifier and the other terminal is AC-grounded. With this structure, the electricity consumption can be reduced without deteriorating the SNR.