Abstract: The present invention relates to protection of accommodated items such as cartridges each incorporating recording media and enhances a protection function for the accommodated items. The present invention relates to protection of accommodated items accommodated in an accommodating shelf into/out of which accommodated items (cartridges) such as cartridges each incorporating recording media such as magnetic tapes can be put/taken.

Abstract: The invention provides a data recording device comprising: an interval counter; an ? counter; and a segment counter, wherein the interval counter and the ? counter operate with a clock having a constant frequency which is independent of clock information, the interval counter is reset when division information is detected and, also, is reset and activates the ? counter when it reaches a count value corresponding to a segment length, the ? counter is reset when the division information is detected and, also, is reset and increments the count value of the segment counter when it reaches a count value corresponding to a predetermined length smaller than the segment length, and the segment counter increments its count value when the division information is detected and outputs a writing inhibition signal when it reaches a count value corresponding to the frame length.

Abstract: The present invention relates to protection of accommodated items such as cartridges each incorporating recording media and enhances a protection function for the accommodated items. The present invention relates to protection of accommodated items accommodated in an accommodating shelf into/out of which accommodated items (cartridges) such as cartridges each incorporating recording media such as magnetic tapes can be put/taken.

Abstract: A control unit for transmitting data to control the operation of a controlled unit transmits a command via a main control channel and a sub control channel. The controlled unit distinguishes via which channel of the main control channel and the sub control channel received data is received and determines whether received data maintains a constant value for a predetermined period of time or not. When it is determined that the received data maintains a constant value, data for distinguishing a channel via which data is received and data indicating that a failure has occurred in a channel are transmitted to the control unit via the other channel. Receiving data indicating that a failure has occurred, the control unit outputs data indicating that a failure has occurred to the outside, and transmits subsequent data using the sub control channel when a failure has occurred in the main control channel.

Abstract: The invention provides a data recording device comprising: an interval counter; an ? counter; and a segment counter, wherein the interval counter and the ? counter operate with a clock having a constant frequency which is independent of clock information, the interval counter is reset when division information is detected and, also, is reset and activates the ? counter when it reaches a count value corresponding to a segment length, the ? counter is reset when the division information is detected and, also, is reset and increments the count value of the segment counter when it reaches a count value corresponding to a predetermined length smaller than the segment length, and the segment counter increments its count value when the division information is detected and outputs a writing inhibition signal when it reaches a count value corresponding to the frame length.

Abstract: A processor and method of booting the processor in which dispensable circuit operation is eliminated to reduce power consumption. A first expected check-sum value relating to instructions and table data and a second expected check-sum value relating only to instructions are held in a boot ROM. When power is turned on, if a power-on determination circuit determines that the power has been turned on for a system, a read selection circuit loads instructions and the table data into an instruction storage memory and a table data storage memory and a check-sum performing circuit performs check-sum using the first expected check-sum value. In the case where the power has been turned on for periodic operation, instructions are loaded into the instruction storage memory, check-sum is performed using the second expected check-sum value, and table data that was saved in a backup memory is loaded into the table data storage memory.

Abstract: A proposed semiconductor device is directed to making unnecessary circuit operation inactive to reduce power consumption because of leakage current. The device is functionally divided into blocks. The power supply systems of the blocks are divided into a non-controlled power supply group in which power is always on and controlled power supply groups in each of which groups a supply of power can be turned on/off independently. When a power supply system control part of the non-controlled power supply group outputs a control signal for power on, a power switch part turns on to release the controlled power supply group from the sleep mode, so that the first processing part starts intermittent operation. Only when it is determined that a first next-processing necessity determining part determines necessity of the next processing, a control signal is generated to activate the next power supply group.

Abstract: A magnetic tape unit includes a magnetic tape provided with a plurality of tracks, a magnetic head for writing or reading data from the tape, a position determiner for monitoring the relative position between the tape and the head, and a position compensator for adjusting this relative position. The monitoring by the position determiner is performed based on signals read out from the servo control tracks of the tape. The position compensator keeps the magnetic head and tape in proper positional relation based on the results of the monitoring by the position determiner.

Abstract: A proposed semiconductor device is directed to making unnecessary circuit operation inactive to reduce power consumption because of leakage current. The device is functionally divided into blocks. The power supply systems of the blocks are divided into a non-controlled power supply group in which power is always on and controlled power supply groups in each of which groups a supply of power can be turned on/off independently. When a power supply system control part of the non-controlled power supply group outputs a control signal for power on, a power switch part turns on to release the controlled power supply group from the sleep mode, so that the first processing part starts intermittent operation. Only when it is determined that a first next-processing necessity determining part determines necessity of the next processing, a control signal is generated to activate the next power supply group.

Abstract: A processor and method of booting the processor in which dispensable circuit operation is eliminated to reduce power consumption. A first expected check-sum value relating to instructions and table data and a second expected check-sum value relating only to instructions are held in a boot ROM. When power is turned on, if a power-on determination circuit determines that the power has been turned on for a system, a read selection circuit loads instructions and the table data into an instruction storage memory and a table data storage memory and a check-sum performing circuit performs check-sum using the first expected check-sum value. In the case where the power has been turned on for periodic operation, instructions are loaded into the instruction storage memory, check-sum is performed using the second expected check-sum value, and table data that was saved in a backup memory is loaded into the table data storage memory.