Patents by Inventor Takanori KAWANAKA

Takanori KAWANAKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11784721
    Abstract: A reception device includes a measurement unit that measures a first number of times for which a first phase and a first reverse phase based on a differential signal obtained by amplifying a signal based on noise intersect with each other, the first reverse phase being a reverse phase of the first phase, an oscillator that transmits a first signal, a comparison unit that compares the first number of times with a predetermined first reference value, and a signal output unit that outputs a second signal indicating that an optical signal has been received when the first number of times and the first reference value coincide with each other. The measurement unit resets the first number of times when the first signal is received.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: October 10, 2023
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takanori Kawanaka, Hiroyuki Ozaki, Yusuke Mitsui
  • Publication number: 20220345225
    Abstract: A reception device includes a measurement unit that measures a first number of times for which a first phase and a first reverse phase based on a differential signal obtained by amplifying a signal based on noise intersect with each other, the first reverse phase being a reverse phase of the first phase, an oscillator that transmits a first signal, a comparison unit that compares the first number of times with a predetermined first reference value, and a signal output unit that outputs a second signal indicating that an optical signal has been received when the first number of times and the first reference value coincide with each other. The measurement unit resets the first number of times when the first signal is received.
    Type: Application
    Filed: August 20, 2020
    Publication date: October 27, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takanori KAWANAKA, Hiroyuki OZAKI, Yusuke MITSUI
  • Publication number: 20220109508
    Abstract: An optical receiver includes a transimpedance amplifier that converts a current signal output from a light-receiving element that receives an optical signal into a voltage signal, and has a variable conversion gain when performing the conversion, a gain control circuit that detects the bottom voltage of the voltage signal output from the transimpedance amplifier and controls the conversion gain of the transimpedance amplifier based on a result of the detection, and a signal detection circuit that outputs a signal detection signal indicating a signal detection result of whether or not an optical signal is being received. When the signal detection signal indicates a transition from an optical signal non-reception state to an optical signal reception state, the gain control circuit terminates the control of the conversion gain and holds the value of the conversion gain at a point in time when the control of the conversion gain is terminated.
    Type: Application
    Filed: December 15, 2021
    Publication date: April 7, 2022
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi YOSHIMA, Takanori KAWANAKA
  • Patent number: 11128385
    Abstract: A signal detection circuit includes: a first DC voltage remover that removes a DC voltage from an input differential signal; a limiting amplifier that adjusts an amplitude of the input differential signal; a reset signal generator that generates an internal reset signal on the basis of the input differential signal obtained after the amplitude is adjusted; a first bias voltage applying unit that generates a differential signal for detection by applying a bias voltage to the signal from which the DC voltage is removed; and a flip-flop circuit that generates a packet detection signal by holding a state indicating input of a packet signal on the basis of the differential signal for detection and releasing the holding on the basis of the internal reset signal. The reset signal generator includes: a differential single-phase conversion circuit; a voltage holding circuit; and a voltage comparison circuit.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: September 21, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Satoshi Yoshima, Takanori Kawanaka
  • Publication number: 20210075387
    Abstract: A limiting amplifier circuitry according to the disclosure includes: a first differential amplifier circuitry capable of adjusting, as voltage offset, a difference between direct-current voltage components of first differential signals input thereto, the first differential amplifier circuitry amplifying the first differential signals and outputting the amplified first differential signals as second differential signals; a second differential amplifier circuitry that amplifies the second differential signals with an amplification factor depending on a difference between direct-current voltage components of the second differential signals; a signal detecting circuitry that detects an amplitude of the second differential signals, determines whether or not the amplitude is larger than a threshold, and outputs a determination result; and an offset control circuitry that controls the voltage offset by using the determination result.
    Type: Application
    Filed: November 20, 2020
    Publication date: March 11, 2021
    Applicant: Mitsubishi Electric Corporation
    Inventors: Takanori KAWANAKA, Yusuke MITSUI
  • Publication number: 20200322063
    Abstract: A signal detection circuit includes: a first DC voltage remover that removes a DC voltage from an input differential signal; a limiting amplifier that adjusts an amplitude of the input differential signal; a reset signal generator that generates an internal reset signal on the basis of the input differential signal obtained after the amplitude is adjusted; a first bias voltage applying unit that generates a differential signal for detection by applying a bias voltage to the signal from which the DC voltage is removed; and a flip-flop circuit that generates a packet detection signal by holding a state indicating input of a packet signal on the basis of the differential signal for detection and releasing the holding on the basis of the internal reset signal. The reset signal generator includes: a differential single-phase conversion circuit; a voltage holding circuit; and a voltage comparison circuit.
    Type: Application
    Filed: June 23, 2020
    Publication date: October 8, 2020
    Applicant: Mitsubishi Electric Corporation
    Inventors: Satoshi YOSHIMA, Takanori KAWANAKA