Abstract: Provided is a defect inspection apparatus including a plurality of detection optical systems for collecting illumination scattered light from the surface of a sample, a plurality of sensors for converting the illumination scattered light collected by the corresponding detection optical systems into electrical signals and outputting detection signals, and a signal processing device for processing the detection signals input from the plurality of sensors, wherein the signal processing device generates a first signal group including an integrated signal obtained by adding a plurality of detection signals in a predetermined combination based on a group of detection signals input from the plurality of sensors, generates a second signal group by performing the filtering processing on each signal that configures the first signal group, generates a third signal group including separated signals separated according to a predetermined rule from the signal corresponding to the integrated signal based on the second signa

Abstract: The present disclosure proposes a method for classifying defects and the like by using a learning device that has been suitably trained, a system, and a computer-readable medium. As one aspect thereof, the present disclosure proposes (see FIG. 1) a defect inspection method, etc., in which one or more computers are used to inspect a defect on a sample on the basis of output information from detectors that detect scattered light produced via the irradiation of the sample with light, wherein defect information is outputted by: receiving output from a plurality of detectors disposed at a plurality of angles of elevation with reference to the sample surface, and at a plurality of sample surface-direction orientations with reference to the irradiation points of the light on the sample; and inputting the output information of the plurality of detectors into a learning device that has been trained using the output information from the plurality of detectors and the defect information.

Abstract: In order to prevent an erroneous determination of an on-film defect, the sensitivity of the post-inspection is reduced so that a film swelling due to a minute defect would not be detected. Classification is performed to determine whether a defect is at least one of an on-film defect and a film swelling, by performing a coordinate correction on the result of a post-inspection by an actual-defect fine alignment using the result of a pre-inspection performed with two-stage thresholds, and by checking defects against each other. In addition, classification is performed to determine whether a defect is at least one of an on-film defect and a film swelling by, during the post-inspection, preparing instruction data from information of the refractive index and thickness of a film formed on a wafer and comparing the instruction data with a signal intensity ratio of a detection system.

Abstract: The present invention addresses the problem of a film formation process in that a minute defect that an inspection before film formation (pre-inspection) has failed to detect becomes a larger film swelling due to film formation, and that, since the film swelling cannot be distinguished from an on-film defect, the film swelling is detected during an inspection after the film formation (post-inspection) as being an on-film defect that is on the film. In order to prevent the erroneous determination of the on-film defect, the sensitivity of the post-inspection has been reduced so that a film swelling due to a minute defect would not be detected.

Abstract: The invention discloses a technique that estimates micro roughness from a total sum of detection signals from plural detection systems and signal ratios, using a light scattering method. The technique rotates and translates a wafer at high speed to measure the entire surface of the wafer with high throughput. The relationship between the micro roughness and the intensity of scattered light varies according to a material of the wafer and a film thickness thereof. Moreover, calibration of an apparatus is also necessary. Thus, for instance, the invention provides a technique that has a function of correcting an optically acquired detection result using a sample which is substantially the same as a measurement target and makes the optically acquired detection result come close to a result measured by an apparatus, such as an AFM, using a different measurement principle.

Abstract: In conventional technologies in surface measurement and defect inspection, considerations are not made for the following points: (1) coarseness of resolution of spatial frequency; (2) variation of detection signal resulting from anisotropy of microroughness; and (3) variation of background signal resulting from anisotropy of microroughness. The present invention is characterized by acquiring a feature quantity about the anisotropy of the microroughness of the substrate surface. Further, the present invention is characterized by acquiring a surface state in consideration of the anisotropy of the microroughness of the substrate surface. Further the present invention is characterized by detecting a defect over the substrate in consideration of the anisotropy of the microroughness of the substrate surface.

Abstract: Patent Document 1 discloses height measurement using an atomic force microscope (AFM) as means for measuring micro roughness. However, since it takes time for this measurement, it is difficult to apply a single display to inspection of all wafers and the entire surface thereof in an in-line manner. The invention provides a technique that estimates micro roughness from a total sum of detection signals from plural detection systems and signal ratios, using a light scattering method. The technique rotates and translates a wafer at high speed to measure the entire surface of the wafer with high throughput. Further, the relationship between the micro roughness and the intensity of scattered light varies according to a material of the wafer and a film thickness thereof. Further, calibration of an apparatus is also necessary.

Abstract: An object is to provide a technique for manufacturing an outer covering rubber having high-voltage electrical insulation characteristics and mechanical characteristics, which are required for a polymer insulator, by decreasing an amount of an additive conducive to improvement in high-voltage electrical insulation characteristics to less than conventional 3% by mass, without using special additional equipment such as ultrasonic agitation. Provided is an outer covering rubber for a polymer insulator, which is obtained by adding an additive conducive to improvement in high-voltage electrical insulation characteristics to a rubber composition, and the additive is a fine powder obtained by crushing a ceramic hydrate into a particle size of 100 nm or less, and the amount of the additive is 0.5 to 2.5% by mass in the entire raw materials of the outer covering rubber for a polymer insulator.

Abstract: In conventional technologies in surface measurement and defect inspection, considerations are not made for the following points: (1) coarseness of resolution of spatial frequency; (2) variation of detection signal resulting from anisotropy of microroughness; and (3) variation of background signal resulting from anisotropy of microroughness. The present invention is characterized by acquiring a feature quantity about the anisotropy of the microroughness of the substrate surface. Further, the present invention is characterized by acquiring a surface state in consideration of the anisotropy of the microroughness of the substrate surface. Further the present invention is characterized by detecting a defect over the substrate in consideration of the anisotropy of the microroughness of the substrate surface.

Abstract: A silicone rubber composition comprising (A) an organopolysiloxane composition of the organic peroxide cure or addition reaction cure type, (B) a normally solid organic compound having at least two ester bonds per molecule, and (C) particulate aluminum hydroxide having an average particle size of up to 20 ?m is suited for use as high-voltage electric insulator since it maintains insulating properties for a long term in outdoor service and has acid resistance and a long lifetime even in polluted areas.

Abstract: A silicone rubber composition comprising (A) an organopolysiloxane composition of the organic peroxide cure or addition reaction cure type, (B) a normally solid organic compound having at least two ester bonds per molecule, and (C) particulate aluminum hydroxide having an average particle size of up to 20 ?m is suited for use as high-voltage electric insulator since it maintains insulating properties for a long term in outdoor service and has acid resistance and a long lifetime even in polluted areas.

Abstract: A liquid crystal plate for storing a liquid crystal material for simultaneously injecting it into a plurality of liquid crystal panels and liquid crystal injection apparatus and method using such liquid crystal plate are disclosed. The liquid crystal plate has a recess for storing the liquid crystal material and a pair of raised members such as ribs, baffles or the like at both end portions of the recess in parallel with the outermost liquid crystal panels. The raised members have the height at least equal to the top surface of the liquid crystal material filled in the recess for maintaining the liquid crystal characteristics of the liquid crystal material injected into the plurality of liquid crystal panels substantially uniform regardless of the location in a cassette.

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: An object of the present invention is to prevent breakage of a cover member of a polymer insulator caused by pecking by a bird, through use of an avian repellent which is carried by the polymer insulator and an avian repellency maintained at least during construction of power transmission equipment, thereby inhibiting pecking of the polymer insulator by birds. The bird-pecking-preventive polymer insulator according to the present invention includes an insulator body, and a holding metal piece 13 fitted on each end of the insulator body, the insulator body being composed of a core member 11 formed of a reinforced plastic material and a cover member 12 formed of a rubber material and covering the periphery of the core member, wherein the cover member 12 carries an avian repellent such as capsaicin.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: A multi-layer capacitor includes first and second side-surface terminal electrodes alternately arranged on four side surfaces of a capacitor body. First and second major-surface terminal electrodes are arranged on a major surface of the capacitor body. First and second internal electrodes which are opposed to each other within the capacitor body are respectively electrically connected at ends thereof to the first and second side-surface terminal electrodes, and are also respectively electrically connected to the first and second major-surface terminal electrodes through via hole conductors. With this arrangement, the directions of the currents flowing within the multi-layer capacitor are diversified, and the lengths of current-carrying paths are shortened so as to achieve a very low ESL value.

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.

Abstract: An apparatus is provided for packaging a laminated capacitor made to have a low ESL value and is used for a decoupling capacitor to be connected to a power supply circuit for a MPU chip providing a MPU. The laminated capacitor is accommodated within a cavity provided on a wiring board. The capacitor includes a plurality of first external terminal electrodes connected to first internal electrodes via a plurality of first feedthrough conductors and a plurality of second external terminal electrodes connected to second internal electrodes via a plurality of second feedthrough conductors. The first external terminal electrodes provided on a first major surface of a capacitor body are connected to via-hole conductors at the hot side for the power source within a substrate, and the second external terminal electrodes provided on first and second major surfaces are connected to grounding via-hole conductors and a mother board within the substrate.