Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: To inhibit a decrease in inductance of an inductor in a plurality of semiconductor chips that are stacked. A semiconductor device includes: first and second semiconductor chips that are stacked; a first inductor; an arrangement-restricted region; and a circuit. In the semiconductor device, the first inductor is arranged in the first semiconductor chip. The arrangement-restricted region is provided in a region of the second semiconductor chip corresponding to the first inductor. The circuit is arranged in a region of the second semiconductor chip not corresponding to the arrangement-restricted region.

Abstract: A three-phase transmitter that sets voltages of first, second, and third output terminals based on first, second, and third signals. The transmitter includes a first transmitting section configured to set the voltage of the first output terminal based on the first and third signals; a second transmitting section configured to set the voltage of the second output terminal based on the first and second signals; and a third transmitting section configured to set the voltage of the third output terminal based on the second and third signals.

Abstract: A transmitter of the present disclosure includes: an output terminal; a driver that performs transition of a voltage of the output terminal among a plurality of voltages; and a controller that controls the driver to cause transition start timing in one voltage transition in voltage transition among the plurality of voltages to be later than transition start timing in another voltage transition.

Abstract: An A/D conversion device includes a phase-difference clock generation unit configured to use a plurality of phase interpolators to generate multi-phase clock signals, of which phases are shifted with respect to an input clock signal, from the input clock signal and a signal obtained by delaying the input clock signal; and an A/D conversion unit configured to perform A/D conversion on an input analog signal using the multi-phase clock signals generated by the phase-difference clock generation unit.

Abstract: An A/D conversion device includes a phase-difference clock generation unit configured to use a plurality of phase interpolators to generate multi-phase clock signals, of which phases are shifted with respect to an input clock signal, from the input clock signal and a signal obtained by delaying the input clock signal; and an A/D conversion unit configured to perform A/D conversion on an input analog signal using the multi-phase clock signals generated by the phase-difference clock generation unit.

Abstract: A transmitting device of the present disclosure include: a first driver that includes a first sub-driver unit which operates on a basis of a first control signal and a second sub-driver unit which operates on a basis of, of the first control signal and a second control signal, a signal selected through a first selecting operation, and is configured to be able to set a voltage at a first output terminal; and a controller that controls the first selecting operation.

Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: To inhibit a decrease in inductance of an inductor in a plurality of semiconductor chips that are stacked. A semiconductor device includes: first and second semiconductor chips that are stacked; a first inductor; an arrangement-restricted region; and a circuit. In the semiconductor device, the first inductor is arranged in the first semiconductor chip. The arrangement-restricted region is provided in a region of the second semiconductor chip corresponding to the first inductor. The circuit is arranged in a region of the second semiconductor chip not corresponding to the arrangement-restricted region.

Abstract: A transmitter of the present disclosure includes: an output terminal; a driver that performs transition of a voltage of the output terminal among a plurality of voltages; and a controller that controls the driver to cause transition start timing in one voltage transition in voltage transition among the plurality of voltages to be later than transition start timing in another voltage transition.

Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: A three-phase transmitter that sets voltages of first, second, and third output terminals based on first, second, and third signals. The transmitter includes a first transmitting section configured to set the voltage of the first output terminal based on the first and third signals; a second transmitting section configured to set the voltage of the second output terminal based on the first and second signals; and a third transmitting section configured to set the voltage of the third output terminal based on the second and third signals.

Abstract: A three-phase transmitter that sets voltages of first, second, and third output terminals based on first, second, and third signals. The transmitter includes a first transmitting section configured to set the voltage of the first output terminal based on the first and third signals; a second transmitting section configured to set the voltage of the second output terminal based on the first and second signals; and a third transmitting section configured to set the voltage of the third output terminal based on the second and third signals.

Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: A three-phase transmitter that sets voltages of first, second, and third output terminals based on first, second, and third signals. The transmitter includes a first transmitting section configured to set the voltage of the first output terminal based on the first and third signals; a second transmitting section configured to set the voltage of the second output terminal based on the first and second signals; and a third transmitting section configured to set the voltage of the third output terminal based on the second and third signals.

Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: A transmitter of the present disclosure includes: an output terminal; a driver that performs transition of a voltage of the output terminal among a plurality of voltages; and a controller that controls the driver to cause transition start timing in one voltage transition in voltage transition among the plurality of voltages to be later than transition start timing in another voltage transition.

Abstract: An A/D conversion device includes a phase-difference clock generation unit configured to use a plurality of phase interpolators to generate multi-phase clock signals, of which phases are shifted with respect to an input clock signal, from the input clock signal and a signal obtained by delaying the input clock signal; and an A/D conversion unit configured to perform A/D conversion on an input analog signal using the multi-phase clock signals generated by the phase-difference clock generation unit.

Abstract: A transmission device of the disclosure includes a first selector configured to select one of a first signal and a second signal, and output the selected signal; a second selector configured to select one of an inversion signal of the first signal, the second signal, and an inversion signal of the second signal, and output the selected signal; a first control signal generator configured to generate a first control signal, a second control signal, and a third control signal, based on the first signal, the second signal, and a third signal; a first driver configured to set a voltage of a first output terminal, based on an output signal of the first selector and the first control signal; and a second driver configured to set a voltage of a second output terminal, based on an output signal of the second selector and the second control signal.

Abstract: A decoupling circuit includes an inverter. The inverter includes i (i is an integer of 1 or more) PMOS transistors each having a first gate electrode, and j (j is an integer of 0 or more) PMOS transistors each having a second gate electrode. The inverter includes m (m is an integer of 1 or more) NMOS transistors each having a third gate electrode, and n (n is an integer of 0 or more) NMOS transistors each having a fourth gate electrode. The first to fourth gate electrodes are coupled to an input end of the inverter. A total area of the first and second gate electrodes is different from a total area of the third and fourth gate electrodes.