Patents by Inventor Takanori Sonoda

Takanori Sonoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11430685
    Abstract: A wafer placement apparatus includes a disc-shaped ceramic plate having an upper surface as a wafer placement surface and in which an electrode is embedded; a disc-shaped cooling plate provided on a lower surface, opposite the wafer placement surface, of the ceramic plate; and a resin adhesive-sheet layer with which a bonding surface as the lower surface of the ceramic plate and a bonding surface as an upper surface of the cooling plate are bonded to each other, wherein at least one of the bonding surface of the ceramic plate and the bonding surface of the cooling plate has a surface roughness Ra that is higher in an outer part of the bonding surface than in an inner part of the bonding surface.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: August 30, 2022
    Assignee: NGK Insulators, Ltd.
    Inventor: Takanori Sonoda
  • Publication number: 20200303230
    Abstract: A wafer placement apparatus includes a disc-shaped ceramic plate having an upper surface as a wafer placement surface and in which an electrode is embedded; a disc-shaped cooling plate provided on a lower surface, opposite the wafer placement surface, of the ceramic plate; and a resin adhesive-sheet layer with which a bonding surface as the lower surface of the ceramic plate and a bonding surface as an upper surface of the cooling plate are bonded to each other, wherein at least one of the bonding surface of the ceramic plate and the bonding surface of the cooling plate has a surface roughness Ra that is higher in an outer part of the bonding surface than in an inner part of the bonding surface.
    Type: Application
    Filed: March 13, 2020
    Publication date: September 24, 2020
    Applicant: NGK INSULATORS, LTD.
    Inventor: Takanori SONODA
  • Patent number: 8865494
    Abstract: A compound semiconductor light-emitting element characterized by high transmittance of an electrically conductive film, low contact resistance and low sheet resistance of electrically conductive film is manufactured. The manufacturing method for a compound semiconductor light-emitting element of the present invention includes the steps of: forming a semiconductor layer formed of a group III nitride semiconductor, including a light-emitting layer on a substrate; forming an electrically conductive film on the side of the semiconductor layer opposite to the side contacting the substrate; conducting first annealing on the electrically conductive film in an atmosphere containing oxygen; conducting second annealing on the electrically conductive film in an atmosphere not containing oxygen; and exposing the electrically conductive film to atmospheric air between the step of conducting first annealing and the step of conducting second annealing.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: October 21, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimi Tanimoto, Takanori Sonoda, Hideaki Ikeda
  • Patent number: 8513118
    Abstract: It is intended to provide a production method that enables at least one of improvement in transparency, reduction in sheet resistance, homogenization in planar distribution of sheet resistance, and reduction in contact resistance related to a contact layer regarding a transparent conductive oxide film included in a compound semiconductor light-emitting device. A method for producing a compound semiconductor light-emitting device includes depositing on a substrate a compound semiconductor stacked-layer body including a light-emitting layer, depositing a transparent conductive oxide film on the compound semiconductor stacked-layer body, and annealing the transparent conductive oxide film and thereafter cooling the same in a vacuum atmosphere.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: August 20, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yoshimi Tanimoto, Takanori Sonoda
  • Patent number: 8461618
    Abstract: A semiconductor light-emitting device includes a substrate, an n-type semiconductor layer located above the substrate, a semiconductor light-emitting layer located on the n-type semiconductor layer, a p-type semiconductor layer located on the semiconductor light-emitting layer. The semiconductor light-emitting device also includes an insulation film located on part of the p-type semiconductor layer in an unexposed section, a first transparent conductive film located on substantially the whole of the p-type semiconductor layer where the insulation film is not located in the unexposed section, and a second transparent conductive film located on the insulation film and the first transparent conductive film.
    Type: Grant
    Filed: July 18, 2011
    Date of Patent: June 11, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Akinori Mizogami, Takanori Sonoda, Masahiko Sakata, Yoshimi Tanimoto, Motoi Nagamori, Daigaku Kimura
  • Publication number: 20120313504
    Abstract: A film-forming device includes: a shield part placed so as to surround the sides of the target; a rod-shaped magnetic field generation unit for generating a magnetic field, the magnetic field generation unit being placed toward the back surface of the target; and a drive unit for reciprocatingly driving the magnetic field generation unit in a linear manner along a drive direction, which is a direction perpendicular to the length direction of the magnetic field generation unit, in a horizontal plane, which is a plane perpendicular to the front/back direction of the target. When the magnetic field generation unit is located at the end of the range within which it is driven by the drive unit, the distance in the drive direction between the magnetic field generation unit and the projection when the shield part is projected perpendicularly to the horizontal plane is 10 mm or more.
    Type: Application
    Filed: March 14, 2012
    Publication date: December 13, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hiroshi SASAKI, Takanori Sonoda
  • Publication number: 20120315718
    Abstract: A compound semiconductor light-emitting element characterized by high transmittance of an electrically conductive film, low contact resistance and low sheet resistance of electrically conductive film is manufactured. The manufacturing method for a compound semiconductor light-emitting element of the present invention includes the steps of: forming a semiconductor layer formed of a group III nitride semiconductor, including a light-emitting layer on a substrate; forming an electrically conductive film on the side of the semiconductor layer opposite to the side contacting the substrate; conducting first annealing on the electrically conductive film in an atmosphere containing oxygen; conducting second annealing on the electrically conductive film in an atmosphere not containing oxygen; and exposing the electrically conductive film to atmospheric air between the step of conducting first annealing and the step of conducting second annealing.
    Type: Application
    Filed: February 18, 2011
    Publication date: December 13, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yoshimi Tanimoto, Takanori Sonoda, Hideaki Ikeda
  • Publication number: 20120080712
    Abstract: It is intended to provide a production method that enables at least one of improvement in transparency, reduction in sheet resistance, homogenization in planar distribution of sheet resistance, and reduction in contact resistance related to a contact layer regarding a transparent conductive oxide film included in a compound semiconductor light-emitting device. A method for producing a compound semiconductor light-emitting device includes depositing on a substrate a compound semiconductor stacked-layer body including a light-emitting layer, depositing a transparent conductive oxide film on the compound semiconductor stacked-layer body, and annealing the transparent conductive oxide film and thereafter cooling the same in a vacuum atmosphere.
    Type: Application
    Filed: September 20, 2011
    Publication date: April 5, 2012
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Yoshimi TANIMOTO, Takanori Sonoda
  • Publication number: 20120018765
    Abstract: A semiconductor light-emitting device includes a substrate, an n-type semiconductor layer located above the substrate, a semiconductor light-emitting layer located on the n-type semiconductor layer, a p-type semiconductor layer located on the semiconductor light-emitting layer. The semiconductor light-emitting device also includes an insulation film located on part of the p-type semiconductor layer in an unexposed section, a first transparent conductive film located on substantially the whole of the p-type semiconductor layer where the insulation film is not located in the unexposed section, and a second transparent conductive film located on the insulation film and the first transparent conductive film.
    Type: Application
    Filed: July 18, 2011
    Publication date: January 26, 2012
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Akinori MIZOGAMI, Takanori SONODA, Masahiko SAKATA, Yoshimi TANIMOTO, Motoi NAGAMORI, Daigaku KIMURA
  • Patent number: 7402513
    Abstract: It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprising the steps of: (1) forming an etching stopper film of a silicon nitride film on an entire surface including a step part on a semiconductor substrate having the step part with an aspect ratio of ?3; (2) forming an interlayer insulation film of an impurity-doped silicate film on the silicon nitride film; and (3) performing reflow of the interlayer insulation film by a heat treatment, wherein the formation of the silicon nitride film is controlled such that the N—H bond density of the silicon nitride film is 1.0×1022 pieces/cm3 or less.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: July 22, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takanori Sonoda, Kazumasa Mitsumune, Kenichiroh Abe, Yushi Inoue, Tsukasa Doi
  • Publication number: 20050159015
    Abstract: It is an object of the present invention to provide a method for forming an interlayer insulation film suppressing the occurrence of voids in the interlayer insulation film. A method for forming an interlayer insulation film of the present invention, comprising the steps of: (1) forming an etching stopper film of a silicon nitride film on an entire surface including a step part on a semiconductor substrate having the step part with an aspect ratio of ?3; (2) forming an interlayer insulation film of an impurity-doped silicate film on the silicon nitride film; and (3) performing reflow of the interlayer insulation film by a heat treatment, wherein the formation of the silicon nitride film is controlled such that the N—H bond density of the silicon nitride film is 1.0×1022 pieces/cm3 or less.
    Type: Application
    Filed: January 12, 2005
    Publication date: July 21, 2005
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Takanori Sonoda, Kazumasa Mitsumune, Kenichiroh Abe, Yushi Inoue, Tsukasa Doi
  • Publication number: 20050118833
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device suppressing the occurrence of voids in an insulating film. A method for manufacturing a semiconductor device according to the present invention comprises the steps of: (1) forming an insulating film 11 composed of a thin silicon nitride film on a semiconductor substrate 1 having at least a necessary element and a recessed part 6 so as to cover the recessed part 6; (2) modifying the surface of the insulating film 11; and (3) forming a BPSG film 15 as an interlayer insulation film on the insulating film. The occurrence of voids in the interlayer insulation film 15 is suppressed by the process for modifying the surface.
    Type: Application
    Filed: November 30, 2004
    Publication date: June 2, 2005
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Kazumasa Mitsumune, Tsukasa Doi, Yushi Inoue, Kenichirou Abe, Takanori Sonoda