Abstract: A Schmitt circuit for a semiconductor integrated circuit has resistances of predetermined resistors of the Schmitt circuit respectively selected from a plurality of resistances so as to obtain desired threshold voltages by selecting electrodes to which wiring is connected when producing the semiconductor integrated circuit according to the master slice method. Thus the Schmitt circuits have different threshold voltages depending on the selection of the electrodes to which the wiring is connected.

Abstract: A logic circuit having a test data loading function, comprising at least one J-K flip-flop. Each J-K flip-flop includes a test data latching logic circuit. In response to an enable signal, test data is selected in place of the usual J and K input data to be latched. In a complex logic circuit including such flip-flops, a test can be effected in a short time.

Abstract: A logical circuit which is capable of serving not only as a shift register but also as counter, comprises a cascade-connection of flip-flops of the same number as the number of bits required. The flip-flops have an input connected to a logical gate group composed of gates which are opened and closed by a shift signal and a count signal. The logical circuit does not require that a flip-flop be included for each shift register part and counter part for each bit, but only requires one flip-flop to perform both the count and shift function. The logical circuit is capable of performing an independent operation of a shift register, an independent operation of a counter and a compound operation of inputting data in a serial fashion for initialization and outputting counted data in a serial fashion.