Patents by Inventor Takanori Sugimoto

Takanori Sugimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080311164
    Abstract: Gelling agents which contain a specific N-acylamino acid monoamide monoalkyl ester have a melting temperature of about 100° C., are capable of solidifying a wide variety of oily base materials including silicones, and do not cause “sweating” while retaining a practical level of gel strength. When applied to skin, the resulting gels have a good feeling, good spreadability, and good fittability to skin.
    Type: Application
    Filed: July 3, 2008
    Publication date: December 18, 2008
    Applicant: AJINOMOTO CO. INC
    Inventors: Keitaro SAITO, Takanori Sugimoto, Tatsuya Hattori
  • Publication number: 20060292813
    Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.
    Type: Application
    Filed: July 27, 2006
    Publication date: December 28, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto
  • Patent number: 7118984
    Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.
    Type: Grant
    Filed: February 14, 2003
    Date of Patent: October 10, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto
  • Patent number: 7006344
    Abstract: The present invention provides a bis(4-mercaptophenyl) sulfide derivative represented by general formula 1. This derivative is a monomer that can form a dielectric film suitable for an electronic component. The present invention further provides a method for producing this derivative and an electronic component having high characteristics under excellent humidity and high temperature.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: February 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Noriyasu Echigo, Kazuyoshi Honda, Yoshiaki Kai, Masaru Odagiri, Hisaaki Tachihara, Hideki Matsuda, Jun Katsube, Kazuo Iwaoka, Takanori Sugimoto, Nobuki Sunagare
  • Publication number: 20030189808
    Abstract: The present invention provides a bis(4-mercaptophenyl) sulfide derivative represented by general formula 1. This derivative is a monomer that can form a dielectric film suitable for an electronic component. The present invention further provides a method for producing this derivative and an electronic component having high characteristics under excellent humidity and high temperature.
    Type: Application
    Filed: April 11, 2003
    Publication date: October 9, 2003
    Inventors: Noriyasu Echigo, Kazuyoshi Honda, Yoshiaki Kai, Masaru Odagiri, Hisaaki Tachihara, Hideki Matsuda, Jun Katsube, Kazuo Iwaoka, Takanori Sugimoto, Nobuki Sunagare
  • Publication number: 20030133249
    Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.
    Type: Application
    Filed: February 14, 2003
    Publication date: July 17, 2003
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto
  • Patent number: 6574087
    Abstract: Electrode layers (1, 2) are arranged on both sides of a dielectric layer (3) facing each other so as to configure a capacitor. Lead electrodes (4, 5) are formed in the electrode layers (1, 2). A penetrating electrode (6) that is insulated from the electrode layers (1, 2) is formed. An electronic component (10) configured in this manner is mounted on a wiring board, and a semiconductor chip can be mounted thereon. Along with connecting the semiconductor chip to the wiring board via the penetrating electrode (6), the semiconductor chip or the wiring board is connected to the lead electrodes (4, 5). In this manner, while suppressing the size increase of a mounted area, the capacitor or the like can be arranged near the semiconductor chip. Thus, the semiconductor chip is driven with high frequency more easily.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: June 3, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuyoshi Honda, Noriyasu Echigo, Masaru Odagiri, Takanori Sugimoto