Patents by Inventor Takanori Yamakawa

Takanori Yamakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9257671
    Abstract: A resin composition for sealing an organic electroluminescent device, containing: a drying agent, and a curable component, wherein a surface roughness Ra of the shear failure surface after curing the resin composition is 0.5 ?m or more; a production method thereof; an adhesive film and a gas-barrier formed of the resin composition; an organic electroluminescent device and an organic electroluminescent panel using the same.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: February 9, 2016
    Assignee: Furukawa Electric Co., Ltd.
    Inventors: Toshihiro Suzuki, Satoshi Hattori, Tetsuya Mieda, Hideto Fukuda, Takanori Yamakawa, Toshimitsu Nakamura
  • Publication number: 20140291655
    Abstract: A resin composition for sealing an organic electroluminescent device, containing: a drying agent, and a curable component, wherein a surface roughness Ra of the shear failure surface after curing the resin composition is 0.5 ?m or more; a production method thereof; an adhesive film and a gas-barrier formed of the resin composition; an organic electroluminescent device and an organic electroluminescent panel using the same.
    Type: Application
    Filed: June 12, 2014
    Publication date: October 2, 2014
    Inventors: Toshihiro SUZUKI, Satoshi HATTORI, Tetsuya MIEDA, Hideto FUKUDA, Takanori YAMAKAWA, Toshimitsu NAKAMURA
  • Patent number: 8043698
    Abstract: A wafer-processing tape, having a removable adhesive layer (2), and an adhesive layer (3), formed on a substrate film (1), wherein the tape is used in a process involving the steps of: grinding a back face of a wafer circuit substrate (5) having convex-type metal electrodes (4), and dicing the wafer circuit substrate into chips, in a state that the tape is adhered to the wafer circuit substrate; and picking up the chips, in which the chips are picked up in a state that the adhesive layer (3) is peeled from the substrate film (1) but is bonded to the individual chip.
    Type: Grant
    Filed: January 31, 2007
    Date of Patent: October 25, 2011
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Yasumasa Morishima, Kenji Kita, Shinichi Ishiwata, Takanori Yamakawa
  • Publication number: 20070141330
    Abstract: A wafer-processing tape, having a removable adhesive layer(2), and an adhesive layer (3), formed on a substrate film(1), wherein the tape is used in a process involving the steps of: grinding a back face of a wafer circuit substrate (5) having convex-type metal electrodes (4), and dicing the wafer circuit substrate into chips, in a state that the tape is adhered to the wafer circuit substrate; and picking up the chips, in which the chips are picked up in a state that the adhesive layer (3) is peeled from the substrate film (1) but is bonded to the individual chip.
    Type: Application
    Filed: January 31, 2007
    Publication date: June 21, 2007
    Inventors: Yasumasa Morishima, Kenji Kita, Shinichi Ishiwata, Takanori Yamakawa