Abstract: According to one embodiment, a semiconductor device includes a channel formation region of first conductivity type, a first offset region of second conductivity type, a first insulating region, a first liner layer, a first semiconductor region of second conductivity type, a second semiconductor region of second conductivity type, a gate insulating film, and a gate electrode. The first liner layer is provided between the first offset region and the first insulating region. The first semiconductor region of second conductivity type is provided on the side opposite to the channel formation region sandwiching the first insulating region therebetween and having impurity concentration higher than that of the first offset region. The second semiconductor region of second conductivity type is provided on the side opposite to the first semiconductor region sandwiching the channel formation region therebetween and having impurity concentration higher than that of the first offset region.

Abstract: According to one embodiment, a semiconductor device includes a channel formation region of first conductivity type, a first offset region of second conductivity type, a first insulating region, a first liner layer, a first semiconductor region of second conductivity type, a second semiconductor region of second conductivity type, a gate insulating film, and a gate electrode. The first liner layer is provided between the first offset region and the first insulating region. The first semiconductor region of second conductivity type is provided on the side opposite to the channel formation region sandwiching the first insulating region therebetween and having impurity concentration higher than that of the first offset region. The second semiconductor region of second conductivity type is provided on the side opposite to the first semiconductor region sandwiching the channel formation region therebetween and having impurity concentration higher than that of the first offset region.

Abstract: A zapping diode concerned with a P-N junction diode provided in an integrated circuit, whose P-N junction is subjected to breakdown by an overvoltage to perform fine adjustment in the value of capacitance or resistance involved in the circuit. The diode has a first impurity region of a first conductivity type formed in a first conductivity type semiconductor region, a second impurity region, an interlayer insulation film formed over the semiconductor region, and a third conductor film formed on the semiconductor region between the first and second impurity region. The third conductor film, when applied by a reverse-bias voltage, controls the direction of breakdown in the P-N junction to thereby provide a consistent value of residual resistance.