Patents by Inventor Takao Miyajima

Takao Miyajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7754504
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: July 13, 2010
    Assignee: Sony Corporation
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Publication number: 20100027573
    Abstract: An ultrashort pulse/ultra-high power laser diode with a simple structure and configuration is provided. In a method of driving a laser diode, the laser diode is driven by a pulse current which is 10 or more times higher than a threshold current value. The width of the pulse current is preferably 10 nanoseconds or less, and the value of the pulse current is specifically 0.4 amperes or over.
    Type: Application
    Filed: July 21, 2009
    Publication date: February 4, 2010
    Applicants: SONY CORPORATION, TOHOKU UNIVERSITY
    Inventors: Hiroyuki Yokoyama, Shunsuke Kono, Tomoyuki Oki, Masao Ikeda, Takao Miyajima, Hideki Watanabe
  • Publication number: 20070085093
    Abstract: A method for manufacturing a light-emitting diode, which includes the steps of: providing a substrate having a plurality of protruded portions on one main surface thereof wherein the protruded portion is made of a material different in type from that of the substrate and growing a first nitride-based III-V Group compound semiconductor layer on each recess portion of the substrate through a state of making a triangle in section wherein a bottom surface of the recess portion becomes a base of the triangle; laterally growing a second nitride-based III-V Group compound semiconductor layer on the substrate from the first nitride-based III-V Group compound semiconductor layer; and successively growing, on the second nitride-based III-V Group compound semiconductor layer, a third nitride-based III-V Group compound semiconductor layer of a first conduction type, an active layer, and a fourth nitride-based III-V compound semiconductor layer of a second conduction type.
    Type: Application
    Filed: September 21, 2006
    Publication date: April 19, 2007
    Inventors: Akira Ohmae, Michinori Shiomi, Noriyuki Futagawa, Takaaki Ami, Takao Miyajima, Yuuji Hiramatsu, Izuho Hatada, Nobukata Okano, Shigetaka Tomiya, Katsunori Yanashima, Tomonori Hino, Hironobu Narui
  • Publication number: 20060258027
    Abstract: A method for making a light-emitting diode, which including the steps of: providing a substrate having at least one recessed portion on one main surface and growing a first nitride-based III-V group compound semiconductor layer through a state of making a triangle in section having a bottom surface of the recessed portion as a base thereby burying the recessed portion; laterally growing a second nitride-based III-V group compound semiconductor layer from the first nitride-based III-V group compound semiconductor layer over the substrate; and successively growing a third nitride-based III-V group compound semiconductor layer of a first conduction type, an active layer and a fourth nitride-based III-V group compound semiconductor layer of a second conduction type on the second nitride-based III-V group compound semiconductor layer.
    Type: Application
    Filed: May 16, 2006
    Publication date: November 16, 2006
    Inventors: Akira Ohmae, Shigetaka Tomiya, Yuki Maeda, Michinori Shiomi, Takaaki Ami, Takao Miyajima, Katsunori Yanashima, Takashi Tange, Atsushi Yasuda
  • Patent number: 6667252
    Abstract: A compound semiconductor substrate is manufactured by forming a higher-quality compound semiconductor layer having a smaller number of crystalline defects on a single-crystal substrate, and removing the single-crystal substrate without causing damage to the compound semiconductor layer. The method comprises the steps of forming the compound semiconductor layer (first, second and third compound semiconductor layers) on the single-crystal substrate (sapphire substrate) through crystal growth so as to partially have a space between the compound semiconductor layer and the single-crystal substrate; and removing the compound semiconductor layer from the sapphire substrate by irradiating the compound semiconductor layer from a side of the sapphire substrate with a laser beam passing through the single-crystal substrate and being absorbed in the compound semiconductor layer to melt an interface between the single-crystal substrate and the compound semiconductor.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: December 23, 2003
    Assignees: Sony Corporation, NEC Corporation
    Inventors: Takao Miyajima, Shigetaka Tomiya, Akira Usui
  • Publication number: 20020146912
    Abstract: A compound semiconductor substrate is manufactured by forming a higher-quality compound semiconductor layer having a smaller number of crystalline defects on a single-crystal substrate, and removing the single-crystal substrate without causing damage to the compound semiconductor layer. The method comprises the steps of forming the compound semiconductor layer (first, second and third compound semiconductor layers) on the single-crystal substrate (sapphire substrate) through crystal growth so as to partially have a space between the compound semiconductor layer and the single-crystal substrate; and removing the compound semiconductor layer from the sapphire substrate by irradiating the compound semiconductor layer from a side of the sapphire substrate with a laser beam passing through the single-crystal substrate and being absorbed in the compound semiconductor layer to melt an interface between the single-crystal substrate and the compound semiconductor.
    Type: Application
    Filed: April 3, 2002
    Publication date: October 10, 2002
    Inventors: Takao Miyajima, Shigetaka Tomiya, Akira Usui
  • Patent number: 6104039
    Abstract: A plurality of first layers made of AlGaN mixed crystal each having a thickness of the order of 1 to 100 nm and a plurality of second layers of p-type GaN with Mg each having a thickness of the order of 1 to 100 nm are alternately stacked. Since each of the first and second layers is thin, the stacked layers as a whole have properties of p-type AlGaN mixed crystal although the first layers do not include Mg and the second layers do not include Al. An Al source and a Mg source are temporally separated to be introduced in a stacking process. A reaction between the Al source and Mg source which may interfere desirable crystal growth is thereby prevented. Crystals of good quality are thus grown and electrical conductivity is thereby improved.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: August 15, 2000
    Assignee: Sony Corporation
    Inventors: Tsunenori Asatsuma, Katsunori Yanashima, Takao Miyajima
  • Patent number: 5981980
    Abstract: To provide a semiconductor laminating structure in which an epitaxial growth of a GaN system material is achieved on a substrate with an excellent matching property with the substrate. The semiconductor laminating structure includes the substrate having a perovskite structure and at least one GaN system chemical compound semiconductor layer formed on the substrate, wherein a major surface of the substrate is formed of a (111) crystal surface.
    Type: Grant
    Filed: April 18, 1997
    Date of Patent: November 9, 1999
    Assignee: Sony Corporation
    Inventors: Takao Miyajima, Yann Le Bellego, Hiroji Kawai
  • Patent number: 5515393
    Abstract: A semiconductor laser using a II-VI compound semiconductor as the material for cladding layers, capable of emitting a blue to green light is disclosed. In an aspect of the semiconductor laser, an n-type ZnSe buffer layer, an n-type ZnMgSSe cladding layer, an active layer made of, for example, ZnCdSe, a p-type ZnMgSSe cladding layer and a p-type ZnSe contact layer are stacked in sequence on an n-type GaAs substrate. A p-side electrode such as an Au/Pd electrode is provided in contact with the p-type ZnSe contact layer. An n-side electrode such as an In electrode is provided on the back surface of the n-type GaAs substrate. In another aspect of the semiconductor laser, an n-type optical guiding layer made of ZnSSe, ZnMgSSe or ZnSe is provided between the n-type ZnMgSSe cladding layer and the active layer, and a p-type optical guiding layer made of ZnSSe, ZnMgSSe or ZnSe is provided between the p-type ZnMgSSe cladding layer and the active layer.
    Type: Grant
    Filed: August 4, 1993
    Date of Patent: May 7, 1996
    Assignee: Sony Corporation
    Inventors: Hiroyuki Okuyama, Katsuhiro Akimoto, Takao Miyajima, Masafumi Ozawa, Yuko Morinaga, Futoshi Hiei, Kazushi Nakano, Toyoharu Ohata
  • Patent number: 5471067
    Abstract: A semiconductor laser capable of emitting blue or green light is disclosed. The semiconductor laser comprises an n-type ZnMgSSe cladding layer, an active layer, a p-type ZnMgSSe cladding layer, a p-type ZnSe contact layer and a p-type ZnTe contact layer which are stacked in this sequence on an n-type GaAs substrate. A p-side electrode is provided on the p-type ZnTe contact layer. An n-side electrode is provided on the back surface of the n-type GaAs substrate. A multiquantum well layer comprising quantum wells made of p-type ZnTe and barriers made of p-type ZnSe is provided in the depletion layer produced in the p-type ZnSe contact layer along the junction interface between the p-type ZnSe contact layer and the p-type ZnTe contact layer. Holes injected from the p-side electrode pass through the junction by the resonant tunneling effect through quantum levels formed in the quantum wells of the multiquantum well layer.
    Type: Grant
    Filed: June 18, 1993
    Date of Patent: November 28, 1995
    Assignee: Sony Corporation
    Inventors: Masao Ikeda, Satoshi Ito, Yoshino Iochi, Takao Miyajima, Masafumi Ozawa, Katsuhiro Akimoto, Akira Ishibash, Futoshi Hiei