Patents by Inventor Takao Noda

Takao Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11911394
    Abstract: The present invention relates to a method for preventing transmission of influenza, wherein said method comprises administering an effective amount of a compound to a patient having an influenza virus infection, herein referred to as “index patient”, wherein the compound has one of the formulae (I) and (II), or its pharmaceutically acceptable salt. The compound to be used in the present invention reduces infectivity of the influenza virus of the index patient, and therefore, reduces the risk of the index patient to trigger an influenza epidemic or an influenza pandemic as compared to a control patient.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: February 27, 2024
    Assignees: Shionogi & Co., Ltd.
    Inventors: Takeshi Noshi, Takahiro Noda, Ryu Yoshida, Takao Shishido, Kaoru Baba, Aeron C. Hurt, Leo Yi Yang Lee, Steffen Wildum, Klaus Kuhlbusch, Barry Clinch, Jan Michal Nebesky, Annabelle Lemenuel, Wendy S. Barclay, Jean-Eric Charoin, Yoshinori Ando
  • Patent number: 9620600
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: April 11, 2017
    Assignee: Kabushiki kaisha Toshiba
    Inventors: Ryoichi Ohara, Takao Noda
  • Patent number: 9608058
    Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: March 28, 2017
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryoichi Ohara, Takao Noda, Yoichi Hori
  • Publication number: 20170077220
    Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.
    Type: Application
    Filed: March 7, 2016
    Publication date: March 16, 2017
    Applicants: KABUSHIKI KAISHA TOSHIBA, KABUSHIKI KAISHA TOSHIBA
    Inventors: Ryoichi OHARA, Takao NODA, Yoichi HORI
  • Publication number: 20160276448
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.
    Type: Application
    Filed: September 15, 2015
    Publication date: September 22, 2016
    Inventors: Ryoichi Ohara, Takao Noda
  • Patent number: 9385243
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: July 5, 2016
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoichi Hori, Takao Noda, Tsuyoshi Oota
  • Patent number: 9379234
    Abstract: According to one embodiment, a semiconductor device includes first electrode, second electrode, and third electrodes, first, second, third, fourth, and fifth semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the second semiconductor region and the second electrode. The third semiconductor region has an impurity concentration higher than an impurity concentration of the first semiconductor region. The third electrode contacts the third, second, and first semiconductor regions via an insulating film. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the fourth semiconductor region and the second electrode.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: June 28, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroshi Kono, Takao Noda
  • Publication number: 20150372153
    Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.
    Type: Application
    Filed: September 2, 2014
    Publication date: December 24, 2015
    Inventors: Yoichi HORI, Takao NODA, Tsuyoshi OTA
  • Publication number: 20150357482
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.
    Type: Application
    Filed: August 18, 2015
    Publication date: December 10, 2015
    Inventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
  • Publication number: 20150287840
    Abstract: A semiconductor device includes first and second electrodes. First semiconductor regions of a first conductivity type are positioned between the first electrode and the second electrode and contact the first electrode. These semiconductor regions are arranged along a first direction. A second semiconductor region of the first conductivity type also contacts the first electrode and is disposed around the plurality of first semiconductor regions. The second semiconductor region has a dopant concentration that is higher than the first semiconductor regions. A semiconductor layer of a second conductivity type has portions that are between the first semiconductor regions and the second semiconductor region. These portions are in Schottky contact with the first electrode.
    Type: Application
    Filed: June 18, 2015
    Publication date: October 8, 2015
    Inventors: Tsuyoshi OTA, Yoichi HORI, Takao NODA
  • Patent number: 9142687
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: September 22, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
  • Publication number: 20150262889
    Abstract: According to one embodiment, a method for manufacturing a semiconductor device, including: detecting whether or not a defect being present in a wafer substrate and obtaining coordinate information of the defect; and determining positions of a first disposal region and a second disposal region in a semiconductor chip region based on the coordinate information so that the defect falls in the first disposal region in disposing in a plane of the semiconductor chip region having the first disposal region on which a first diode having a first conductivity type region and a second conductivity type region being disposed and the second disposal region on which a second diode having a metal film and a semiconductor region contacting the metal film being disposed.
    Type: Application
    Filed: August 21, 2014
    Publication date: September 17, 2015
    Inventors: Atsuko Yamashita, Yoichi Hori, Takao Noda, Hiroshi Kono
  • Publication number: 20150263158
    Abstract: According to one embodiment, a semiconductor device includes first electrode, second electrode, and third electrodes, first, second, third, fourth, and fifth semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the second semiconductor region and the second electrode. The third semiconductor region has an impurity concentration higher than an impurity concentration of the first semiconductor region. The third electrode contacts the third, second, and first semiconductor regions via an insulating film. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the fourth semiconductor region and the second electrode.
    Type: Application
    Filed: August 29, 2014
    Publication date: September 17, 2015
    Inventors: Hiroshi Kono, Takao Noda
  • Patent number: 9029915
    Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1-xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1-yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: May 12, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
  • Publication number: 20150035111
    Abstract: A semiconductor device includes first and second electrodes. First semiconductor regions of a first conductivity type are positioned between the first electrode and the second electrode and contact the first electrode. These semiconductor regions are arranged along a first direction. A second semiconductor region of the first conductivity type also contacts the first electrode and is disposed around the plurality of first semiconductor regions. The second semiconductor region has a dopant concentration that is higher than the first semiconductor regions. A semiconductor layer of a second conductivity type has portions that are between the first semiconductor regions and the second semiconductor region. These portions are in Schottky contact with the first electrode.
    Type: Application
    Filed: February 21, 2014
    Publication date: February 5, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuyoshi OTA, Yoichi HORI, Takao NODA
  • Publication number: 20150001552
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.
    Type: Application
    Filed: March 7, 2014
    Publication date: January 1, 2015
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
  • Patent number: 8916881
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
  • Patent number: 8866151
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer of a first conductivity type, a first region of a second conductivity type selectively provided in a first major surface of the semiconductor layer, a second region of the second conductivity type selectively provided in the first major surface and connected to the first region, a first electrode provided in contact with the semiconductor layer and the first region, a second electrode provided in contact with the second region, and a third electrode electrically connected to a second major surface of the semiconductor layer opposite to the first major surface.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: October 21, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takao Noda, Ryoichi Ohara, Kenya Sano, Toru Sugiyama
  • Publication number: 20140283618
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a semiconductor substrate, an insulating gate field-effect transistor, and a strain gauge unit. The semiconductor substrate is placed on the substrate and has first and second regions. The insulating gate field-effect transistor is provided in the first region of the semiconductor substrate. The strain gauge unit has a long metal resistor, a first insulating film and a second insulating film. The long metal resistor is provided inside of an upper surface of the semiconductor substrate in the second region of the semiconductor substrate. The first insulating film is provided between the semiconductor substrate and the metal resistor and extends up to the upper surface of the semiconductor substrate. The second insulating film is provided above the first insulating film across the metal resistor.
    Type: Application
    Filed: September 5, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takaaki Yasumoto, Naoko Yanase, Ryoichi Ohara, Shingo Masuko, Kenya Sano, Yorito Kakiuchi, Takao Noda, Atsuko IIda
  • Publication number: 20140014971
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 16, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoko YANASE, Shingo MASUKO, Takaaki YASUMOTO, Ryoichi OHARA, Yorito KAKIUCHI, Takao NODA, Kenya SANO