Patents by Inventor Takao Noda
Takao Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911394Abstract: The present invention relates to a method for preventing transmission of influenza, wherein said method comprises administering an effective amount of a compound to a patient having an influenza virus infection, herein referred to as “index patient”, wherein the compound has one of the formulae (I) and (II), or its pharmaceutically acceptable salt. The compound to be used in the present invention reduces infectivity of the influenza virus of the index patient, and therefore, reduces the risk of the index patient to trigger an influenza epidemic or an influenza pandemic as compared to a control patient.Type: GrantFiled: December 23, 2021Date of Patent: February 27, 2024Assignees: Shionogi & Co., Ltd.Inventors: Takeshi Noshi, Takahiro Noda, Ryu Yoshida, Takao Shishido, Kaoru Baba, Aeron C. Hurt, Leo Yi Yang Lee, Steffen Wildum, Klaus Kuhlbusch, Barry Clinch, Jan Michal Nebesky, Annabelle Lemenuel, Wendy S. Barclay, Jean-Eric Charoin, Yoshinori Ando
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Patent number: 9620600Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.Type: GrantFiled: September 15, 2015Date of Patent: April 11, 2017Assignee: Kabushiki kaisha ToshibaInventors: Ryoichi Ohara, Takao Noda
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Patent number: 9608058Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.Type: GrantFiled: March 7, 2016Date of Patent: March 28, 2017Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi Ohara, Takao Noda, Yoichi Hori
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Publication number: 20170077220Abstract: A semiconductor device includes a SiC layer that has a first surface and a second surface, a first electrode in contact with the first surface, a first SiC region of a first conductivity type in the SiC layer, a second SiC region of a second conductivity type in the SiC layer and surrounding a portion of the first SiC region, a third SiC region of the second conductivity type in the SiC layer and surrounding the second SiC region, the third SiC region having an impurity concentration of the second conductivity type lower than that of the second SiC region, and a fourth SiC region of the second conductivity type in the SiC layer between the second SiC region and the third Sic region, the fourth SiC region having an impurity concentration of the second conductivity type higher than that of the second SiC region.Type: ApplicationFiled: March 7, 2016Publication date: March 16, 2017Applicants: KABUSHIKI KAISHA TOSHIBA, KABUSHIKI KAISHA TOSHIBAInventors: Ryoichi OHARA, Takao NODA, Yoichi HORI
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Publication number: 20160276448Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate having a first surface and a second surface. The semiconductor substrate includes an element region and a termination region provided around the element region. The termination region has a first semiconductor region of a first conductivity type provided at the first surface of the semiconductor substrate and a second semiconductor region of a second conductivity type provided between the first semiconductor region and the second surface. The semiconductor device further includes a first insulating film provided on the first semiconductor region, a second insulating film provided on the first semiconductor region and having a portion interposed between the first insulating films, a first electrode provided on the first surface of the element region and electrically connected to the first semiconductor region, and a second electrode provided at the second surface of the semiconductor substrate.Type: ApplicationFiled: September 15, 2015Publication date: September 22, 2016Inventors: Ryoichi Ohara, Takao Noda
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Patent number: 9385243Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.Type: GrantFiled: September 2, 2014Date of Patent: July 5, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Yoichi Hori, Takao Noda, Tsuyoshi Oota
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Patent number: 9379234Abstract: According to one embodiment, a semiconductor device includes first electrode, second electrode, and third electrodes, first, second, third, fourth, and fifth semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the second semiconductor region and the second electrode. The third semiconductor region has an impurity concentration higher than an impurity concentration of the first semiconductor region. The third electrode contacts the third, second, and first semiconductor regions via an insulating film. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the fourth semiconductor region and the second electrode.Type: GrantFiled: August 29, 2014Date of Patent: June 28, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Kono, Takao Noda
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Publication number: 20150372153Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor region that is formed between the first electrode and the second electrode and is in contact with the first electrode, a second semiconductor region that is formed between the first semiconductor region and the second electrode, a contact region that is formed between the second semiconductor region and the second electrode and is in contact with the second semiconductor region and the second electrode, a plurality of third semiconductor regions that are formed between the second electrode and the first semiconductor region and are in contact with the second electrode, and a wiring that is in contact with the second electrode, a portion of the wiring bonded to the second electrode being positioned above the third semiconductor region and not positioned above the contact region.Type: ApplicationFiled: September 2, 2014Publication date: December 24, 2015Inventors: Yoichi HORI, Takao NODA, Tsuyoshi OTA
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Publication number: 20150357482Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: ApplicationFiled: August 18, 2015Publication date: December 10, 2015Inventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Publication number: 20150287840Abstract: A semiconductor device includes first and second electrodes. First semiconductor regions of a first conductivity type are positioned between the first electrode and the second electrode and contact the first electrode. These semiconductor regions are arranged along a first direction. A second semiconductor region of the first conductivity type also contacts the first electrode and is disposed around the plurality of first semiconductor regions. The second semiconductor region has a dopant concentration that is higher than the first semiconductor regions. A semiconductor layer of a second conductivity type has portions that are between the first semiconductor regions and the second semiconductor region. These portions are in Schottky contact with the first electrode.Type: ApplicationFiled: June 18, 2015Publication date: October 8, 2015Inventors: Tsuyoshi OTA, Yoichi HORI, Takao NODA
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Patent number: 9142687Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: GrantFiled: March 7, 2014Date of Patent: September 22, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Publication number: 20150262889Abstract: According to one embodiment, a method for manufacturing a semiconductor device, including: detecting whether or not a defect being present in a wafer substrate and obtaining coordinate information of the defect; and determining positions of a first disposal region and a second disposal region in a semiconductor chip region based on the coordinate information so that the defect falls in the first disposal region in disposing in a plane of the semiconductor chip region having the first disposal region on which a first diode having a first conductivity type region and a second conductivity type region being disposed and the second disposal region on which a second diode having a metal film and a semiconductor region contacting the metal film being disposed.Type: ApplicationFiled: August 21, 2014Publication date: September 17, 2015Inventors: Atsuko Yamashita, Yoichi Hori, Takao Noda, Hiroshi Kono
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Publication number: 20150263158Abstract: According to one embodiment, a semiconductor device includes first electrode, second electrode, and third electrodes, first, second, third, fourth, and fifth semiconductor regions. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the second semiconductor region and the second electrode. The third semiconductor region has an impurity concentration higher than an impurity concentration of the first semiconductor region. The third electrode contacts the third, second, and first semiconductor regions via an insulating film. The fourth semiconductor region is provided between the first semiconductor region and the second electrode. The fifth semiconductor region is provided between the fourth semiconductor region and the second electrode.Type: ApplicationFiled: August 29, 2014Publication date: September 17, 2015Inventors: Hiroshi Kono, Takao Noda
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Patent number: 9029915Abstract: A semiconductor device includes: a first semiconductor layer made of an AlxGa1-xN (0?x<1); a second semiconductor layer provided on the first semiconductor layer and made of an undoped or first conductivity type AlyGa1-yN (0<y?1, x<y); an anode electrode and a cathode electrode which are connected to the second semiconductor layer; and a third semiconductor layer of second conductivity type provided between the anode electrode and the cathode electrode when viewed from a direction perpendicular to an upper surface of the second semiconductor layer. The third semiconductor layer is depleted when a predetermined magnitude or more of voltage is applied between the anode electrode and the cathode electrode.Type: GrantFiled: February 12, 2013Date of Patent: May 12, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Wataru Saito, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta
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Publication number: 20150035111Abstract: A semiconductor device includes first and second electrodes. First semiconductor regions of a first conductivity type are positioned between the first electrode and the second electrode and contact the first electrode. These semiconductor regions are arranged along a first direction. A second semiconductor region of the first conductivity type also contacts the first electrode and is disposed around the plurality of first semiconductor regions. The second semiconductor region has a dopant concentration that is higher than the first semiconductor regions. A semiconductor layer of a second conductivity type has portions that are between the first semiconductor regions and the second semiconductor region. These portions are in Schottky contact with the first electrode.Type: ApplicationFiled: February 21, 2014Publication date: February 5, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsuyoshi OTA, Yoichi HORI, Takao NODA
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Publication number: 20150001552Abstract: According to one embodiment, a semiconductor device includes a first semiconductor region, a first electrode, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, a fifth semiconductor region, and a second electrode. The first electrode forms a Schottky junction with the first region. The second region is provided between the first region and the first electrode. The third region is provided between the first region and the first electrode and forms an ohmic junction with the first electrode. The fourth region is provided between the first region and the third region. The fourth region has a higher impurity concentration than the first region. The fifth region is provided between the third region and the first electrode. The fifth region has a higher impurity concentration than the third region. The second electrode is provided on opposite side of the first region from the first electrode.Type: ApplicationFiled: March 7, 2014Publication date: January 1, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoichi Hori, Takao Noda, Kohei Morizuka, Ryoichi Ohara
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Patent number: 8916881Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.Type: GrantFiled: September 10, 2013Date of Patent: December 23, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
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Patent number: 8866151Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer of a first conductivity type, a first region of a second conductivity type selectively provided in a first major surface of the semiconductor layer, a second region of the second conductivity type selectively provided in the first major surface and connected to the first region, a first electrode provided in contact with the semiconductor layer and the first region, a second electrode provided in contact with the second region, and a third electrode electrically connected to a second major surface of the semiconductor layer opposite to the first major surface.Type: GrantFiled: March 20, 2012Date of Patent: October 21, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Takao Noda, Ryoichi Ohara, Kenya Sano, Toru Sugiyama
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Publication number: 20140283618Abstract: According to one embodiment, a semiconductor device includes a substrate, a semiconductor substrate, an insulating gate field-effect transistor, and a strain gauge unit. The semiconductor substrate is placed on the substrate and has first and second regions. The insulating gate field-effect transistor is provided in the first region of the semiconductor substrate. The strain gauge unit has a long metal resistor, a first insulating film and a second insulating film. The long metal resistor is provided inside of an upper surface of the semiconductor substrate in the second region of the semiconductor substrate. The first insulating film is provided between the semiconductor substrate and the metal resistor and extends up to the upper surface of the semiconductor substrate. The second insulating film is provided above the first insulating film across the metal resistor.Type: ApplicationFiled: September 5, 2013Publication date: September 25, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Takaaki Yasumoto, Naoko Yanase, Ryoichi Ohara, Shingo Masuko, Kenya Sano, Yorito Kakiuchi, Takao Noda, Atsuko IIda
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Publication number: 20140014971Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.Type: ApplicationFiled: September 10, 2013Publication date: January 16, 2014Applicant: Kabushiki Kaisha ToshibaInventors: Naoko YANASE, Shingo MASUKO, Takaaki YASUMOTO, Ryoichi OHARA, Yorito KAKIUCHI, Takao NODA, Kenya SANO