Abstract: There is disclosed a functional block which comprises a function portion, a plurality of block input terminals, a plurality of block output terminals, a first signal holding circuit group connected between inputs of the function portion and the plurality of block input terminals, and a second signal holding circuit group connected between outputs of the function portion and the plurality of block output terminals. Since the first signal holding circuits and the second signal holding circuits receive a clock signal supplied externally to the functional block and then operate to synchronize with the clock signal respectively, a delay time of output signals for input signals in the functional block can be easily estimated. Hence, simulation of a semiconductor integrated circuit constructed by combining a plurality of functional blocks can be easily performed.