Patents by Inventor Takaomi Nishi

Takaomi Nishi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20160247772
    Abstract: A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.
    Type: Application
    Filed: May 5, 2016
    Publication date: August 25, 2016
    Inventors: Takaomi Nishi, Takehiko Saito, Katsuhiro Torii
  • Patent number: 9362241
    Abstract: A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: June 7, 2016
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takaomi Nishi, Takehiko Saito, Katsuhiro Torii
  • Publication number: 20160064343
    Abstract: A manufacturing method for semiconductor devices includes the steps of forming an Ni/Au film that includes an Ni film and an Au film formed over the Ni film over a wiring that is coupled to each of a plurality of electrode pads formed over a principal surface of a semiconductor wafer and arranges each of the electrode pads at a different position, grinding a back surface of the semiconductor wafer, performing reduction treatment on a surface of the Ni/Au film, and forming a solder bump over the Ni/Au film. In the reduction treatment, respective processes of flux application, reflow soldering and cleaning are performed and the solder bump is bonded to the Ni/Au film after the reduction treatment has been completed. Thereby, bonding reliability in flip chip bonding of a semiconductor device is improved.
    Type: Application
    Filed: August 18, 2015
    Publication date: March 3, 2016
    Inventors: Takaomi Nishi, Takehiko Saito, Katsuhiro Torii
  • Publication number: 20050116138
    Abstract: The reliability and production yield of a solid state image sensing device is improved. Over a surface of a wiring substrate, a sensor chip and a lens-barrel having the sensor chip housed therein are mounted. To the lens-barrel, a lens holder for retaining a lens is connected. Over a back surface of the wiring substrate, a logic chip, a memory chip and a passive part are mounted, and they are sealed with a sealing resin. The lens-barrel and lens holder are each threaded. They are thermally welded while the threads are fitted to each other. The passive part is bonded to the wiring substrate via a Sn—Ag type Pb-free solder. After the wiring substrate is subjected to plasma washing treatment, the sensor chip is mounted over the wiring substrate and an electrode pad of the sensor chip and an electrode of the wiring substrate are electrically connected via a bonding wire.
    Type: Application
    Filed: September 22, 2004
    Publication date: June 2, 2005
    Inventors: Kenji Hanada, Masaki Nakanishi, Kunio Shigemura, Takaomi Nishi, Koji Shida, Izumi Tezuka, Shunichi Abe, Yoshihiro Tomita, Mitsuaki Seino, Tohru Komatsu