Patents by Inventor Takashi Akai

Takashi Akai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240141090
    Abstract: An unsaturated polyester resin composition contains an unsaturated polyester, a vinyl ester, a polymerizable monomer, and an aluminum hydroxide. The vinyl ester is a reaction product of an epoxy resin and an unsaturated monobasic acid. The vinyl ester is blended in a predetermined ratio to the unsaturated polyester. The aluminum hydroxide is blended in a predetermined ratio to the vinyl ester.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 2, 2024
    Inventors: Ikuo AKAI, Masahiro HAKOTANI, Takashi TSUKAMOTO
  • Patent number: 9584131
    Abstract: A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.
    Type: Grant
    Filed: April 15, 2016
    Date of Patent: February 28, 2017
    Assignees: Sony Corporation, Sony Interactive Entertainment Inc.
    Inventors: Takahisa Kojima, Masashi Endo, Takashi Akai, Hideki Hara
  • Publication number: 20160322973
    Abstract: A programmable device is disclosed which includes: a circuit data setting section configured to set a logical configuration in a processing circuit using first setting information retrieved from a memory; and a communication status monitoring section configured to determine whether communication is established between the processing circuit and a host computer using the setting made by the circuit data setting section. If it is determined that the communication is not established, the circuit data setting section retrieves from the memory second setting information different from the first setting information to again set a logical configuration in the processing circuit on the basis of the second setting information.
    Type: Application
    Filed: April 15, 2016
    Publication date: November 3, 2016
    Applicant: Sony Interactive Entertainment Inc.
    Inventors: Takahisa Kojima, Masashi Endo, Takashi Akai, Hideki Hara
  • Patent number: 7640388
    Abstract: A file storage apparatus capable of restoring integrity of file management information even when a power supply abnormality occurs without lowering the write speed. When updating meta data stored in an HDD, log data for reconstructing the meta data after update from the meta data before update is written into a non-volatile RAM (NVRAM), then, after this writing is completed, the update is executed. Accordingly, even when the update use meta data temporarily stored in a cache memory is partially lost due to trouble such as a power supply abnormality and when update of the meta data of a hard disk is incomplete, the log data corresponding to the meta data for the update is held in the NVRAM, so it becomes possible to restore the integrity of the meta data on the hard disk by using this log data.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: December 29, 2009
    Assignee: Sony Corporation
    Inventors: Katsuya Nakashima, Hideki Hara, Takashi Akai, Toshifumi Nomura, Kazumi Sato, Yukihisa Tsuneda, Toshiyuki Nishihara
  • Publication number: 20050080762
    Abstract: A file storage apparatus capable of restoring integrity of file management information even when a power supply abnormality occurs without lowering the write speed. When updating meta data stored in an HDD, log data for reconstructing the meta data after update from the meta data before update is written into a non-volatile RAM (NVRAM), then, after this writing is completed, the update is executed. Accordingly, even when the update use meta data temporarily stored in a cache memory is partially lost due to trouble such as a power supply abnormality and when update of the meta data of a hard disk is incomplete, the log data corresponding to the meta data for the update is held in the NVRAM, so it becomes possible to restore the integrity of the meta data on the hard disk by using this log data.
    Type: Application
    Filed: October 8, 2004
    Publication date: April 14, 2005
    Inventors: Katsuya Nakashima, Hideki Hara, Takashi Akai, Toshifumi Nomura, Kazumi Sato, Yukihisa Tsuneda, Toshiyuki Nishihara
  • Publication number: 20010044861
    Abstract: Improving the efficiency of processing isochronous data in isochronous transmission by use of a 1394-brigde. A forward stream bit of an isochronous reception context control register of a 1394OHIC unit 124a is set at 1 to thereby provide a common format such that each isochronous channel of reception data stored in a memory 112 may have the same header information as transmission data. A CPU 111 confirms that the forward stream bit of an isochronous transmission context control register of a 1394OHCI 124b has been set at 1 and then prepares each isochronous channel of transmission data without treating the data only by deleting information necessary only at the time of reception (i.e., time information and information indicating a reception state) from each channel of data to be transmitted stored in the memory 112.
    Type: Application
    Filed: May 14, 2001
    Publication date: November 22, 2001
    Inventors: Yoshikatsu Niwa, Takashi Akai, Shinya Masunaga
  • Publication number: 20010044869
    Abstract: To make it possible to transmit a transmission packet which always includes correct information for identifying a transmission end. In a bridge portal 103b, a transmission packet, which is transmitted from a 13940HCI section 124b to a Link section 125b, is made to include transmission end information for indicating whether the transmission end of the transmission packet is a self-node, or the transmission end thereof is another node residing in another bus. When an asynchronous data packet is produced in the Link section 125b based on the transmission packet, if another node is a transmission end, the node ID of another node included in the transmission packet is used as a source ID. Contrarily, if the self-node is a transmission end, the node ID of the self-node is used. In this manner, it becomes possible to transmit an asynchronous data packet which always include the node ID of the correct transmission end to the 1394-bus 102 (Bus #2).
    Type: Application
    Filed: May 14, 2001
    Publication date: November 22, 2001
    Inventors: Yoshikatsu Niwa, Takashi Akai
  • Patent number: 4701874
    Abstract: A digital signal processing apparatus is disclosed. A delay circuit generates (2p+1) signals x.sub.k-n to x.sub.k+n (n=0, 1, 2, . . . , p), each having a difference respective delay time. The apparatus further comprises a computation circuit responsive to the foregoing signal for computing ##EQU1## wherein coefficients j and h.sub.0 to h.sub.n are ".+-.1" and "1" or "0", respectively.
    Type: Grant
    Filed: December 12, 1983
    Date of Patent: October 20, 1987
    Assignee: NEC Corporation
    Inventors: Takashi Akai, Katsuro Okamoto, Shiro Usui