Abstract: An object of the invention is to provide an effective cooling-energy storing performance and a stable cooling-energy radiating performance and to realize a high productivity. An evaporator has a plurality of refrigerant tubes arranged at almost equal intervals to form therebetween accommodating spaces. A plurality of cooling-storage containers are arranged in some of the accommodating spaces and fins are arranged in the remaining accommodating spaces. A cooling-storage unit is formed by one cooling-storage container and two refrigerant tubes arranged at both sides of the cooling-storage container. Each of the cooling-storage container has projections extending from one wall portion to the other wall portion to form heat exchange portions. The cooling-storage container is connected to the refrigerant tubes by soldering material.

Abstract: A semiconductor integrated circuit device capable of suppressing variations in transistor characteristics due to the well proximity effect is provided. Standard cell rows are arranged in a vertical direction, each standard cell row including standard cells arranged in a horizontal direction. In the standard cell rows, positions of the N well and the P region in the vertical direction are switched every other row. Adjacent standard cell rows share the P region or the N well. A distance from a PMOS transistor located at an end of a standard cell row to an end of an N well is greater than or equal to a width of an N well shared by standard cell rows.

Abstract: An object of the invention is to provide an effective cooling-energy storing performance and a stable cooling-energy radiating performance and to realize a high productivity. An evaporator has a plurality of refrigerant tubes arranged at almost equal intervals to form therebetween accommodating spaces. A plurality of cooling-storage containers are arranged in some of the accommodating spaces and fins are arranged in the remaining accommodating spaces. A cooling-storage unit is formed by one cooling-storage container and two refrigerant tubes arranged at both sides of the cooling-storage container. Each of the cooling-storage container has projections extending from one wall portion to the other wall portion to form heat exchange portions. The cooling-storage container is connected to the refrigerant tubes by soldering material.

Abstract: A semiconductor integrated circuit device capable of suppressing variations in transistor characteristics due to the well proximity effect is provided. Standard cell rows are arranged in a vertical direction, each standard cell row including standard cells arranged in a horizontal direction. In the standard cell rows, positions of the N well and the P region in the vertical direction are switched every other row. Adjacent standard cell rows share the P region or the N well. A distance from a PMOS transistor located at an end of a standard cell row to an end of an N well is greater than or equal to a width of an N well shared by standard cell rows.

Abstract: An apparatus for supplying a component carrier in the form of a tape is provided. The component carrier has a number of cavities formed on one surface thereof for containing components. A pair of spaced first and second guide plates that function to guide one surface of the component carrier. A movable guide plate is disposed between the first and second guide plates so that it can move back and forth between a first position adjacent to the first guide plate for defining a component pickup station and a second position adjacent to the second guide plate. The movable guide plate has an extension which extends along at least one longitudinal edge of the component carrier and opposes the one surface of the component carrier for preventing movement thereof when the movable guide plate takes the first position.

Abstract: An apparatus 101 for supplying a component carrier in the form of a tape is provided. The component carrier 102 has a number of cavities 116 formed on one surface thereof for containing components 115. A pair of spaced first and second guide plates 106 and 107 guide one surface of the component carrier. A movable guide plate 109 is disposed between the first and second guide plates so that it can move back and forth between a first position adjacent to the first guide plate for defining a component pickup station 111 and a second position adjacent to said second guide plate. The movable guide plate has an extension 112 which extends along at least one longitudinal edge of the component carrier and opposes to said one surface of said component carrier for preventing movement thereof when the movable guide plate takes the first position.

Abstract: An apparatus 101 for supplying a component carrier in the form of a tape is provided. The component carrier 102 has a number of cavities 116 formed on one surface thereof for containing components 115. A pair of spaced first and second guide plates 106 and 107 guide one surface of the component carrier. A movable guide plate 109 is disposed between the first and second guide plates so that it can move back and forth between a first position adjacent to the first guide plate for defining a component pickup station 111 and a second position adjacent to said second guide plate. The movable guide plate has an extension 112 which extends along at least one longitudinal edge of the component carrier and opposes to said one surface of said component carrier for preventing movement thereof when the movable guide plate takes the first position.

Abstract: In a static circuit or the like, upper and lower terminals are both set to a first power supply potential Vdd1 in the operating state of an inverter circuit. In the non-operating state, the power supply potential of the upper terminal is reduced to a second power supply potential Vdd2 (<<Vdd1). Provided that an input signal of the inverter circuit has a potential Vdd2 (H level), an output signal thereof must be held at the ground potential (L level) in the operating state. This requires that a conductance Gp of a PMOS transistor and a conductance Gn of a NMOS transistor satisfy the relation: Gp<Gn. Therefore, a well terminal (lower terminal) of the PMOS transistor is set to a potential higher than the power supply potential Vdd2 in order to maintain the relation: Gp<Gn. Accordingly, a signal determined by the circuit in the operating state can be held even in the non-operating state, and the power supply voltage is set to an extremely low potential in the non-operating state of the circuit.

Abstract: An apparatus 101 for supplying a component carrier in the form of a tape is provided. The component carrier 102 has a number of cavities 116 formed on one surface thereof for containing components 115. A pair of spaced first and second guide plates 106 and 107 guide one surface of the component carrier. A movable guide plate 109 is disposed between the first and second guide plates so that it can move back and forth between a first position adjacent to the first guide plate for defining a component pickup station 111 and a second position adjacent to said second guide plate. The movable guide plate has an extension 112 which extends along at least one longitudinal edge of the component carrier and opposes to said one surface of said component carrier for preventing movement thereof when the movable guide plate takes the first position.

Abstract: In a static circuit or the like, upper and lower terminals are both set to a first power supply potential Vdd1 in the operating state of an inverter circuit. In the non-operating state, the power supply potential of the upper terminal is reduced to a second power supply potential Vdd2 (<<Vdd1). Provided that an input signal of the inverter circuit has a potential Vdd2 (H level), an output signal thereof must be held at the ground potential (L level) in the operating state. This requires that a conductance Gp of a PMOS transistor and a conductance Gn of a NMOS transistor satisfy the relation: Gp<Gn. Therefore, a well terminal (lower terminal) of the PMOS transistor is set to a potential higher than the power supply potential Vdd2 in order to maintain the relation: Gp<Gn. Accordingly, a signal determined by the circuit in the operating state can be held even in the non-operating state, and the power supply voltage is set to an extremely low potential in the non-operating state of the circuit.