Abstract: An example design information disclosure system includes a design information managing system for storing design information produced on the basis of a given format, a terminal system, connected to a communication network, having a terminal with an electronic mail function, and a design information disclosing system connected to the communication network. The disclosing system has a format converter and a storage to establish a TIFF file. The format converter receives design information at a predetermined timing when the design information is made to be stored into the design information storing system and converts the received design information into a format displayable on the terminal. The TIFF file is used to store the format-converted design information as terminal-use design information. The terminal system is configured to display on the terminal the terminal-use design information through the electronic mail function.

Abstract: A design information disclosure system (1) comprises a design information managing system (3) for storing design information produced on the basis of a given format, a terminal system (10), connected to a communication network (2), having a terminal (9a, 9b, . . . , 9n) with an electronic mail function, and a design information disclosing system (4) connected to the communication network (2). The disclosing system (4) has a format converter (17) and a storage to establish a TIFF file (18). The format converter receives design information at a predetermined timing when the design information is made to be stored into the design information storing system and converts the received design information into a format displayable on the terminal. The TIFF file is used to store the format-converted design information as terminal-use design information. The terminal system is configured to display on the terminal the terminal-use design information through the electronic mail function.

Abstract: A semiconductor memory device comprising a write transistor with a gate connected to a write word line and with a first impurity region forming a source or drain connected to a bit line, a read transistor with a gate connected to a second impurity region forming a source or drain of the write transistor, a first impurity region connected to a read word line, and a second impurity region connected to a bit line, and a capacitor connected between the gate and the second impurity region of the read transistor.