Abstract: A semiconductor memory device includes a stacked body, a semiconductor portion, a first insulating film, a charge storage layer, and a second insulating film. The stacked body has a plurality of electrode layers stacked in a spaced apart manner from each other. The semiconductor portion is provided in the stacked body and extends in a first direction where the plurality of electrode layers are stacked. The first insulating film is provided between the plurality of electrode layers and the semiconductor portion. The charge storage layer is provided between the plurality of electrode layers and the first insulating film and contains a compound including at least one of hafnium oxide or zirconium oxide and a first material having a valence lower than that of the at least one of the hafnium oxide or the zirconium oxide.

Abstract: According to an embodiment, a manufacturing method of a semiconductor device includes: carrying a substrate alternately stacked an electrode layer and an insulation layer into a chamber; increasing the temperature in the chamber to a predetermined temperature; and supplying hydrogen and material gas including metal simultaneously into the chamber, and supplying oxidizing gas the partial pressure ratio of which to the hydrogen is set so as to provide an atmosphere of reducing the electrode layer, by using an ALD method, and thereby forming, on a surface of the electrode layer and a surface of the insulation layer, a metal oxide layer obtained by oxidizing the metal.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes first and second gate electrode layers, an inter-layer insulating layer, a channel layer, a tunneling insulating layer, first and second charge storage portions, and a blocking insulating layer. The channel layer is separated from the first and second gate electrode layers, and the inter-layer insulating layer. The tunneling insulating layer is provided between the first gate electrode layer and the channel layer. The first charge storage portion is provided between the first gate electrode layer and the tunneling insulating layer. The second charge storage portion is provided the second gate electrode layer and the tunneling insulating layer. The blocking insulating layer is provided between the inter-layer insulating layer and the tunneling insulating layer, between the first gate electrode layer and the first charge storage portion, between the inter-layer insulating layer and the first charge storage portion.

Abstract: A semiconductor memory device includes a stacked body, a semiconductor portion, a first insulating film, a charge storage layer, and a second insulating film. The stacked body has a plurality of electrode layers stacked in a spaced apart manner from each other. The semiconductor portion is provided in the stacked body and extends in a first direction where the plurality of electrode layers are stacked. The first insulating film is provided between the plurality of electrode layers and the semiconductor portion. The charge storage layer is provided between the plurality of electrode layers and the first insulating film and contains a compound including at least one of hafnium oxide or zirconium oxide and a first material having a valence lower than that of the at least one of the hafnium oxide or the zirconium oxide.

Abstract: According to an embodiment, a manufacturing method of a semiconductor device includes: carrying a substrate alternately stacked an electrode layer and an insulation layer into a chamber; increasing the temperature in the chamber to a predetermined temperature; and supplying hydrogen and material gas including metal simultaneously into the chamber, and supplying oxidizing gas the partial pressure ratio of which to the hydrogen is set so as to provide an atmosphere of reducing the electrode layer, by using an ALD method, and thereby forming, on a surface of the electrode layer and a surface of the insulation layer, a metal oxide layer obtained by oxidizing the metal.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes first and second gate electrode layers, an inter-layer insulating layer, a channel layer, a tunneling insulating layer, first and second charge storage portions, and a blocking insulating layer. The channel layer is separated from the first and second gate electrode layers, and the inter-layer insulating layer. The tunneling insulating layer is provided between the first gate electrode layer and the channel layer. The first charge storage portion is provided between the first gate electrode layer and the tunneling insulating layer. The second charge storage portion is provided the second gate electrode layer and the tunneling insulating layer. The blocking insulating layer is provided between the inter-layer insulating layer and the tunneling insulating layer, between the first gate electrode layer and the first charge storage portion, between the inter-layer insulating layer and the first charge storage portion.

Abstract: A semiconductor memory device includes a semiconductor layer, a stacked body on the semiconductor layer, the stacked body including a first insulating layer and an electrode layer, a channel layer within and extending through the stacked body and electrically connected to the semiconductor layer, a second insulating layer between the channel layer and the electrode layer, a charge storage layer between the second insulating layer and the electrode layer, and a third insulating layer between the charge storage layer and the electrode layer. The third insulating layer includes an insulating film on a side of the charge storage layer and a first dielectric layer on a side of the electrode layer. The first dielectric layer includes a first material, a second material, and oxygen.

Abstract: A semiconductor memory device according to an embodiment, includes a stacked body, a semiconductor member, a charge storage layer, a charge block layer and an electrode antioxidant layer. The stacked body includes a plurality of electrode layers stacked separated from each other and an inter-electrode insulating layer between the electrode layers. The semiconductor member extends in a stacking direction of the stacked body and penetrates the stacked body. The tunnel insulating layer is provided on a side surface of the semiconductor member. The charge storage layer is provided on a side surface of the tunnel insulating layer. The charge block layer is provided on a side surface of the charge storage layer and contains oxygen. The electrode antioxidant layer is provided between the charge block layer and the electrode layer and has a composition different from that of the electrode layer.

Abstract: A semiconductor memory device according to an embodiment, includes a stacked body, a semiconductor member, a charge storage layer, a charge block layer and an electrode antioxidant layer. The stacked body includes a plurality of electrode layers stacked separated from each other and an inter-electrode insulating layer between the electrode layers. The semiconductor member extends in a stacking direction of the stacked body and penetrates the stacked body. The tunnel insulating layer is provided on a side surface of the semiconductor member. The charge storage layer is provided on a side surface of the tunnel insulating layer. The charge block layer is provided on a side surface of the charge storage layer and contains oxygen. The electrode antioxidant layer is provided between the charge block layer and the electrode layer and has a composition different from that of the electrode layer.

Abstract: According to a nonvolatile memory device including a semiconductor layer, a control electrode, a memory layer provided between the semiconductor layer and the control electrode, a first insulating film provided between the semiconductor layer and the memory layer, and a second insulating film provided between the control electrode and the memory layer. The second insulating film includes a metal oxide having a monoclinic structure.

Abstract: A non-volatile semiconductor memory device according to an embodiment includes a semiconductor substrate, a tunnel insulating film on the semiconductor substrate, a first electric charge storage layer on the tunnel insulating film, a first insulating layer on the first electric charge storage layer, a second electric charge storage layer on the first insulating layer and including a metal containing layer, a first metal diffusion suppressing layer on the second electric charge storage layer to suppress diffusion of metal contained in the second electric charge storage layer, a second insulating layer on the first metal diffusion suppressing layer, and a control electrode on the second insulating layer.

Abstract: In accordance with an embodiment, a semiconductor device includes a substrate, a line-and-space structure, a first film and a second film. The line-and-space structure includes line patterns arranged on the substrate parallel to one another at a predetermined distance. The first film is formed on side surfaces and bottom surfaces of the line patterns by an insulating film material. The second film is formed on the line-and-space structure across a space between the line patterns by a material showing low wettability to the first film. Space between the line patterns includes an air gap in which at least a bottom surface of the first film is totally exposed.

Abstract: In accordance with an embodiment, a semiconductor device includes a substrate, a line-and-space structure, a first film and a second film. The line-and-space structure includes line patterns arranged on the substrate parallel to one another at a predetermined distance. The first film is formed on side surfaces and bottom surfaces of the line patterns by an insulating film material. The second film is formed on the line-and-space structure across a space between the line patterns by a material showing low wettability to the first film. Space between the line patterns includes an air gap in which at least a bottom surface of the first film is totally exposed.