Patents by Inventor Takashi GO
Takashi GO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220086538Abstract: A wavelength monitoring apparatus includes a wavelength monitoring circuit. The wavelength monitoring circuit includes: a split circuit that splits an input optical signal into two; an optical delay circuit that applies a delay time difference to the two split optical signals; and a two-input two-output optical multiplexer/demultiplexer circuit that outputs a result of applying multiplexing interference to the optical signals to which the delay time difference has been applied. The wavelength monitoring apparatus further includes photoelectric conversion elements that perform photoelectric conversions on the two optical signals output from the wavelength monitoring circuit so as to output electrical signals.Type: ApplicationFiled: January 8, 2020Publication date: March 17, 2022Inventors: Osamu Moriwaki, Takashi Saida, Kenya Suzuki, Takashi Go, Manabu Oguma, Yuichiro Ikuma
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Publication number: 20220066244Abstract: The present invention realizes an optical signal processing device that enables using a thermal oxidation silica film as the under clad of a silica PLC while also increasing the thickness of the under clad and reducing the time required for film growth during manufacturing. The optical signal processing device is formed as a planar optical circuit that includes an optical waveguide formed on a silicon substrate, and has a phase modulation element that employs a thermo-optical effect. A plurality of silica films are provided between a core of the optical waveguide and the silicon substrate, and at least one of the silica films was formed by thermal oxidation.Type: ApplicationFiled: December 24, 2019Publication date: March 3, 2022Inventors: Keita Yamaguchi, Ai Yanagihara, Kenya Suzuki, Takashi Go, Osamu Moriwaki
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Publication number: 20220011508Abstract: A wavelength monitoring circuit obtains a light output proportional to only an input optical signal, independent of wavelength, by adding a light split circuit to the configuration in the related art, or changing the light split circuit to a light trifurcation circuit. In addition, wavelength monitoring with high accuracy is possible while improving the resistance to noise. The extraction of the light output proportional to only the input optical signal is performed by a light split circuit for input light at the top stage of the wavelength monitoring circuit or a light split circuit for interference in a stage in the middle of the circuit. The changed light split circuit causes the MZI included in the wavelength monitoring circuit to operate in a state of losing the balance of the configuration or the optical signal level, and increases the signal level near the bottom portion of the transmission characteristics.Type: ApplicationFiled: January 17, 2020Publication date: January 13, 2022Inventors: Osamu Moriwaki, Manabu Oguma, Kenya Suzuki, Takashi Go, Yuichiro Ikuma
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Publication number: 20210397065Abstract: The positions at which electrode pads are arranged can be made more flexible, and electrical interconnects to be installed can be reduced. In addition, the degree of integration of a chip increases, making it possible to realize a large-scale device (optical switch etc.). In an optical module of the present invention, an interposer (an electrical connection intermediary component with electrode pins attached onto upper and lower faces in an array) is laid over a chip that includes a device configured by using a planar lightwave circuit (PLC) fixed onto a fixing metal plate, and a control substrate for driving the device is laid over the interposer. These components are mechanically fixed by a fixing screw or the like, and the electrode pads of the chip and the control substrate are connected to each other via the interposer.Type: ApplicationFiled: December 11, 2019Publication date: December 23, 2021Inventors: Ai Yanagihara, Kenya Suzuki, Takashi Go, Keita Yamaguchi, Yuko Kawajiri
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Patent number: 11194093Abstract: In an optical switch array on which optical switches that require individual electric wires are integrated, the present invention provides an optical switch array and a multi-cast switch in which the electric wires are shortened by optimizing the arrangement of the optical circuit portion. In the optical switch array in which three arrays of 1×4 switch circuits are disposed in parallel, the position where each optical switch is disposed is sequentially shifted by Dy in the y axis direction. That is, in the case where an adjacent 1×4 optical switch circuit exists on both sides, the 1×4 optical switch located there between is located at the center of the two 1×4 optical switch circuits, which are adjacent in the y axis direction.Type: GrantFiled: March 4, 2019Date of Patent: December 7, 2021Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Kazunori Senoo, Keita Yamaguchi, Kenya Suzuki, Takashi Go
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Patent number: 11162187Abstract: A vapor phase growth device includes a flow channel defining a space through which a source gas for forming an epi layer flows, a susceptor configured to hold a substrate in a state where the substrate faces the space, and a first member disposed vertically above and opposite to the susceptor, the first member having a thermal expansion coefficient not less than 0.7 times and not more than 1.3 times the thermal expansion coefficient of the substrate. The flow channel includes a holding portion configured to hold the first member.Type: GrantFiled: October 31, 2019Date of Patent: November 2, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Takashi Go
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Patent number: 11152521Abstract: A semiconductor laminate includes a substrate composed of InP, a first buffer layer composed of InP containing less than 1×1021 cm?3 Sb and disposed on the substrate, and a second buffer layer composed of InGaAs and disposed on the first buffer layer. The first buffer layer includes a first layer that has a higher concentration of Sb than the substrate and that is arranged to include a first main surface which is a main surface of the first buffer layer on the substrate side. The second buffer layer includes a second layer that has a lower concentration of Sb than the first layer and that is arranged to include a second main surface which is a main surface of the second buffer layer on the first buffer layer side.Type: GrantFiled: November 7, 2019Date of Patent: October 19, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma Fuyuki, Takashi Go, Takashi Ishizuka
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Patent number: 11112561Abstract: Provided is a variable wavelength filter having a wide variable wavelength range. In the variable wavelength filter, a slab waveguide that is a component of an arrayed-waveguide grating has a groove into which a resin is inserted. The groove intersects with a plurality of line segments A joining a place of connection between an input light waveguide and the slab waveguide to places of connection between respective array waveguides and the slab waveguide. The groove is formed such that a total length LA of an intersection of the groove and each of the line segments A monotonously increases or decreases between the adjacent line segments A with a difference in the total length LA between the adjacent line segments A being constant.Type: GrantFiled: March 4, 2019Date of Patent: September 7, 2021Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATIONInventors: Kenya Suzuki, Takashi Go, Osamu Moriwaki, Ai Yanagihara, Keita Yamaguchi
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Publication number: 20210258663Abstract: An optical signal processing device is described herein for reducing electric wirings in an optical switch or an optical filter realized using an optical waveguide. The optical signal processing device includes an optical waveguide formed on a substrate. In the optical signal processing device, the optical waveguide includes at least one input port and at least one output port, a plurality of driven elements are provided including a phase shifter that produces a phase shift to an optical signal from the input port, each of the driven elements includes at least two control terminals, control wirings are provided to have control signals being time-division synchronized applied between the two control terminals, and the control wiring for accessing the driven element is shared by the plurality of driven elements.Type: ApplicationFiled: June 19, 2019Publication date: August 19, 2021Inventors: Keita Yamaguchi, Kenya Suzuki, Takashi Go, Osamu Moriwaki, Ai Yanagihara
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Semiconductor laminate, light-receiving element, and method for manufacturing semiconductor laminate
Patent number: 11081605Abstract: A semiconductor laminate includes a substrate formed of a group III-V compound semiconductor and a quantum well structure disposed on the substrate. The quantum well structure includes a second element layer formed of a group III-V compound semiconductor and containing Sb and a first element layer formed of a group III-V compound semiconductor and disposed in contact with the second element layer. In the first element layer, the thickness of a region in which the content of Sb decreases in a direction away from the substrate from 80% of the maximum content of Sb in the second element layer to 6% of the maximum content is from 0.5 nm to 3.0 nm inclusive.Type: GrantFiled: August 24, 2018Date of Patent: August 3, 2021Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma Fuyuki, Tomohiro Doi, Takashi Go, Takashi Ishizuka -
Publication number: 20210141153Abstract: Provided is a variable wavelength filter having a wide variable wavelength range. In the variable wavelength filter, a slab waveguide that is a component of an arrayed-waveguide grating has a groove into which a resin is inserted. The groove intersects with a plurality of line segments A joining a place of connection between an input light waveguide and the slab waveguide to places of connection between respective array waveguides and the slab waveguide. The groove is formed such that a total length LA of an intersection of the groove and each of the line segments A monotonously increases or decreases between the adjacent line segments A with a difference in the total length LA between the adjacent line segments A being constant.Type: ApplicationFiled: March 4, 2019Publication date: May 13, 2021Inventors: Kenya Suzuki, Takashi Go, Osamu Moriwaki, Ai Yanagihara, Keita Yamaguchi
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Publication number: 20210026220Abstract: There is provided an optical signal processing device capable of RC in a complex space using optical intensity and phase information. An optical modulator controlled by an electric signal processing circuit modulates laser light, which is emitted from a laser light source, at a modulation period either or both of the intensity and phase values of the optical electric field. On the other hand, an input signal is also modulated by the optical modulator at a modulation period in the time domain so as to be an input signal. The converted input signal passes through an optical transmission path and enters an optical circulation circuit via an optical coupler. Part of the circulating light is branched into two by an optical coupler, and the branched light is converted into a complex intermediate signal at a coherent optical receiver. This complex intermediate signal demodulated at the coherent optical receiver is computed at an electric signal processing circuit, and thereby the operation as RC can be performed.Type: ApplicationFiled: February 20, 2019Publication date: January 28, 2021Inventors: Mitsumasa Nakajima, Masanobu Inubushi, Takashi Go, Toshikazu Hashimoto
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Publication number: 20200408990Abstract: In an optical switch array on which optical switches that require individual electric wires are integrated, the present invention provides an optical switch array and a multi-cast switch in which the electric wires are shortened by optimizing the arrangement of the optical circuit portion. In the optical switch array in which three arrays of 1×4 switch circuits are disposed in parallel, the position where each optical switch is disposed is sequentially shifted by Dy in the y axis direction. That is, in the case where an adjacent 1×4 optical switch circuit exists on both sides, the 1×4 optical switch located there between is located at the center of the two 1×4 optical switch circuits, which are adjacent in the y axis direction.Type: ApplicationFiled: March 4, 2019Publication date: December 31, 2020Inventors: Kazunori Senoo, Keita Yamaguchi, Kenya Suzuki, Takashi Go
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Patent number: 10790401Abstract: A semiconductor stacked body includes a base layer containing a III-V group compound semiconductor, a light-receiving layer containing a III-V group compound semiconductor, a control layer containing a III-V group compound semiconductor and disposed in contact with the light-receiving layer, a diffusion blocking layer containing a III-V group compound semiconductor and a p-type impurity that generates a p-type carrier, the diffusion blocking layer having a p-type impurity concentration of 1×1016 cm?3 or less, and a contact layer containing a III-V group compound semiconductor and having p-type conductivity. These layers are stacked in this order. The concentration of an element in the control layer, the element being identical to a group V element contained in the light-receiving layer, is lower on a main surface of the control layer adjacent to the diffusion blocking layer than on a main surface of the control layer adjacent to the light-receiving layer.Type: GrantFiled: May 9, 2019Date of Patent: September 29, 2020Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma Fuyuki, Takashi Go, Takashi Ishizuka
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Publication number: 20200227576Abstract: A semiconductor laminate includes a substrate composed of InP, a first buffer layer composed of InP containing less than 1×1021 cm?3 Sb and disposed on the substrate, and a second buffer layer composed of InGaAs and disposed on the first buffer layer. The first buffer layer includes a first layer that has a higher concentration of Sb than the substrate and that is arranged to include a first main surface which is a main surface of the first buffer layer on the substrate side. The second buffer layer includes a second layer that has a lower concentration of Sb than the first layer and that is arranged to include a second main surface which is a main surface of the second buffer layer on the first buffer layer side.Type: ApplicationFiled: November 7, 2019Publication date: July 16, 2020Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma FUYUKI, Takashi GO, Takashi ISHIZUKA
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SEMICONDUCTOR LAMINATE, LIGHT-RECEIVING ELEMENT, AND METHOD FOR MANUFACTURING SEMICONDUCTOR LAMINATE
Publication number: 20200203542Abstract: A semiconductor laminate includes a substrate formed of a group III-V compound semiconductor and a quantum well structure disposed on the substrate. The quantum well structure includes a second element layer formed of a group III-V compound semiconductor and containing Sb and a first element layer formed of a group III-V compound semiconductor and disposed in contact with the second element layer. In the first element layer, the thickness of a region in which the content of Sb decreases in a direction away from the substrate from 80% of the maximum content of Sb in the second element layer to 6% of the maximum content is from 0.5 nm to 3.0 nm inclusive.Type: ApplicationFiled: August 24, 2018Publication date: June 25, 2020Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma FUYUKI, Tomohiro DOI, Takashi GO, Takashi ISHIZUKA -
Publication number: 20200165744Abstract: A vapor phase growth device includes a flow channel defining a space through which a source gas for forming an epi layer flows, a susceptor configured to hold a substrate in a state where the substrate faces the space, and a first member disposed vertically above and opposite to the susceptor, the first member having a thermal expansion coefficient not less than 0.7 times and not more than 1.3 times the thermal expansion coefficient of the substrate. The flow channel includes a holding portion configured to hold the first member.Type: ApplicationFiled: October 31, 2019Publication date: May 28, 2020Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Takashi GO
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Publication number: 20190355857Abstract: A semiconductor stacked body includes a base layer containing a III-V group compound semiconductor, a light-receiving layer containing a III-V group compound semiconductor, a control layer containing a III-V group compound semiconductor and disposed in contact with the light-receiving layer, a diffusion blocking layer containing a III-V group compound semiconductor and a p-type impurity that generates a p-type carrier, the diffusion blocking layer having a p-type impurity concentration of 1×1016 cm?3 or less, and a contact layer containing a III-V group compound semiconductor and having p-type conductivity. These layers are stacked in this order. The concentration of an element in the control layer, the element being identical to a group V element contained in the light-receiving layer, is lower on a main surface of the control layer adjacent to the diffusion blocking layer than on a main surface of the control layer adjacent to the light-receiving layer.Type: ApplicationFiled: May 9, 2019Publication date: November 21, 2019Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventors: Takuma FUYUKI, Takashi GO, Takashi ISHIZUKA
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Publication number: 20080186645Abstract: A relay control apparatus includes a relay contact, a relay coil which turns on the relay contact when the relay coil is electrically conducted, and a current control unit which controls a first current and a second current. The first current is larger in a current amount per unit time than the second current. The current control unit controls to flow the first current through the relay coil until a predetermined time has elapsed from a beginning of an electrical conduction of the relay coil. The current control unit controls to start to flow the second current through the relay coil on or before the predetermined time has elapsed to maintain a turn-on state of the relay contact. The predetermined time is longer than a chattering time in which a chattering in the relay contact occurs at the beginning of the electrical conduction.Type: ApplicationFiled: November 30, 2007Publication date: August 7, 2008Applicant: YAZAKI CORPORATIONInventors: Mitsuaki MORIMOTO, Akinori MARUYAMA, Akiyoshi KANAZAWA, Takashi GO HARA