Abstract: A wafer processing method for divides a wafer into individual device chips along a plurality of division lines. The method includes forming a dividing groove along each division line formed on the front side of the wafer, the dividing groove having a depth corresponding to the finished thickness of each device chip, thinning the wafer to expose the dividing groove to the back side of the wafer, thereby dividing the wafer into the individual device chips, applying a liquid resin for die bonding to the back side of the wafer and next solidifying the liquid resin applied to the back side of the wafer, thereby forming a die bonding resin film having a predetermined thickness on the back side of each device chip, and isolating each device chip from the wafer.

Abstract: A wafer processing method for divides a wafer into individual device chips along a plurality of division lines. The method includes forming a dividing groove along each division line formed on the front side of the wafer, the dividing groove having a depth corresponding to the finished thickness of each device chip, thinning the wafer to expose the dividing groove to the back side of the wafer, thereby dividing the wafer into the individual device chips, applying a liquid resin for die bonding to the back side of the wafer and next solidifying the liquid resin applied to the back side of the wafer, thereby forming a die bonding resin film having a predetermined thickness on the back side of each device chip, and isolating each device chip from the wafer.

Abstract: A wafer processing method of processing a wafer with a plurality of devices disposed in areas demarcated by projected division lines and formed on a face side thereof includes a protective member placing step of placing a protective member for protecting the face side of the wafer on the face side of the wafer which is divided into individual device chips, a resin laying step of laying a die-bonding resin on the reverse sides of the individual device chips by applying a die-bonding liquid resin on the reverse side of the wafer and hardening the applied die-bonding liquid resin, and a separation step of separating the device chips with the die-bonding liquid resin laid on the reverse sides thereof from the wafer.

Abstract: According to one embodiment, a memory device includes a first electrode, a first resistance change layer, a first insulating section, a second electrode and an intermediate layer. The first resistance change layer is provided on the first electrode. The first insulating section is provided on the first resistance change layer. The second electrode is provided on the first resistance change layer. The second electrode is in contact with the first resistance change layer. The intermediate layer is provided between the second electrode and the first insulating section. The intermediate layer is in contact with the second electrode and the first insulating section.

Abstract: A wafer processing method of processing a wafer with a plurality of devices disposed in areas demarcated by projected division lines and formed on a face side thereof includes a protective member placing step of placing a protective member for protecting the face side of the wafer on the face side of the wafer which is divided into individual device chips, a resin laying step of laying a die-bonding resin on the reverse sides of the individual device chips by applying a die-bonding liquid resin on the reverse side of the wafer and hardening the applied die-bonding liquid resin, and a separation step of separating the device chips with the die-bonding liquid resin laid on the reverse sides thereof from the wafer.

Abstract: According to one embodiment, a first electrode includes a metal element. A second electrode includes a semiconductor element. A third electrode includes a metal element. A first variable resistive layer is arranged between the first electrode and the second electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the first electrode. A second variable resistive layer is arranged between the second electrode and the third electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the third electrode.

Abstract: According to one embodiment, nonvolatile memory device includes a semiconductor layer, a conductive layer and a resistance change layer. The semiconductor layer has an impurity concentration less than 1×1019 cm?3. The resistance change layer is provided between the semiconductor layer and the conductive layer. The resistance change layer includes a fixed charge. The resistance change layer is reversibly transitionable between a first state and a second state by at least one selected from a current supplied via the semiconductor layer and the conductive layer and a voltage applied via the semiconductor layer and the conductive layer. A resistance of the resistance change layer in the second state is higher than a resistance of the resistance change layer in the first state.

Abstract: According to one embodiment, a memory device includes a first electrode, a first resistance change layer, a first insulating section, a second electrode and an intermediate layer. The first resistance change layer is provided on the first electrode. The first insulating section is provided on the first resistance change layer. The second electrode is provided on the first resistance change layer. The second electrode is in contact with the first resistance change layer. The intermediate layer is provided between the second electrode and the first insulating section. The intermediate layer is in contact with the second electrode and the first insulating section.

Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode, and a variable resistance film. The variable resistance film is connected between the first electrode and the second electrode. The first electrode includes a metal contained in a matrix made of a conductive material. A cohesive energy of the metal is lower than a cohesive energy of the conductive material. A concentration of the metal at a central portion of the first electrode in a width direction thereof is higher than concentrations of the metal in two end portions of the first electrode in the width direction.

Abstract: According to one embodiment, a memory device includes a first electrode, a second electrode, and a variable resistance film. The variable resistance film is connected between the first electrode and the second electrode. The first electrode includes a metal contained in a matrix made of a conductive material. A cohesive energy of the metal is lower than a cohesive energy of the conductive material. A concentration of the metal at a central portion of the first electrode in a width direction thereof is higher than concentrations of the metal in two end portions of the first electrode in the width direction.

Abstract: According to one embodiment, a first electrode includes a metal element. A second electrode includes a semiconductor element. A third electrode includes a metal element. A first variable resistive layer is arranged between the first electrode and the second electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the first electrode. A second variable resistive layer is arranged between the second electrode and the third electrode and is capable of reversibly changing a resistance by filament formation and dissolution of the metal element of the third electrode.