Patents by Inventor Takashi HAKUNO

Takashi HAKUNO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140248729
    Abstract: According to one embodiment, a semiconductor device includes a substrate and a stacked body on the substrate via a joining metal layer. The stacked body includes a device portion and a peripheral portion. The device portion includes from a bottommost layer to a topmost layer included in the stacked body. The peripheral portion surrounding and provided around the device portion; the peripheral portion is a portion of the bottommost layer to the topmost layer included in the stacked body and includes a portion of a semiconductor layer in contact with the joining metal layer.
    Type: Application
    Filed: May 15, 2014
    Publication date: September 4, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiro Fujiwara, Takashi Hakuno, Tokuhiko Matsunaga, Kimitaka Yoshimura, Katsufumi Kondo
  • Patent number: 8759852
    Abstract: According to one embodiment, a semiconductor device includes a substrate and a stacked body on the substrate via a joining metal layer. The stacked body includes a device portion and a peripheral portion. The device portion includes from a bottommost layer to a topmost layer included in the stacked body. The peripheral portion surrounding and provided around the device portion; the peripheral portion is a portion of the bottommost layer to the topmost layer included in the stacked body and includes a portion of a semiconductor layer in contact with the joining metal layer.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: June 24, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akihiro Fujiwara, Takashi Hakuno, Tokuhiko Matsunaga, Kimitaka Yoshimura, Katsufumi Kondo
  • Publication number: 20120319138
    Abstract: According to one embodiment, in a semiconductor light emitting device, a substrate includes a first surface and a second surface opposite to each other, lateral surfaces intersected with the first surface and the second surface, first regions each provided on the lateral surface, and second regions each provided on the lateral surface. Each of the first regions has a first width and a first roughness. Each of the second regions has a second width smaller than the first width and a second roughness smaller than the first roughness. The first region is provided from a position away from the first surface by a first distance. The first regions and the second regions are alternately arranged. A semiconductor laminated body is provided above the first surface of the substrate, and includes a first semiconductor layer, an active layer and a second semiconductor layer.
    Type: Application
    Filed: March 16, 2012
    Publication date: December 20, 2012
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Akihiro FUJIWARA, Kimitaka YOSHIMURA, Takashi HAKUNO
  • Publication number: 20120018752
    Abstract: According to one embodiment, a semiconductor device includes a substrate and a stacked body on the substrate via a joining metal layer. The stacked body includes a device portion and a peripheral portion. The device portion includes from a bottommost layer to a topmost layer included in the stacked body. The peripheral portion surrounding and provided around the device portion; the peripheral portion is a portion of the bottommost layer to the topmost layer included in the stacked body and includes a portion of a semiconductor layer in contact with the joining metal layer.
    Type: Application
    Filed: March 3, 2011
    Publication date: January 26, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akihiro FUJIWARA, Takashi HAKUNO, Tokuhiko MATSUNAGA, Kimitaka YOSHIMURA, Katsufumi KONDO