Abstract: A digital signal process of a plurality of functions is enabled by a common hardware constructed on one chip having input terminals t1, t2 and t2'; output terminals t3 and t4; and a control signal input terminal t5. The chip is constructed to include class sorting circuits 111a and 111b; delay and selecting circuits 112a and 112b; switching circuits 113a and 113b; switching circuits 114a and 114b; coefficient memories 115a and 115b; filter operating circuits 116a and 116b; a line delay circuit 117; a product sum operating circuit 118; and a switching circuit 119. Signal flow and circuit functions are selectively controlled by control signals. The functions of the chip can be consequently switched and a plurality of signal processes are realized by one chip.

Abstract: A delay register section 31 holds SD pixels of a luminance signal and a classification section 33 decides a class, reads a coefficient corresponding to the decision result from a coefficient RAM section 40, and outputs the coefficient to a product-sum section 38. The product-sum section 38 captures the pixel data for 17 taps from the delay register section 31, converts the pixel data into seven taps, and outputs them to the product-sum section 38. The product-sum section 38 performs the product-sum operation of pixel data and coefficients and outputs the operation result as HD pixels. An interpolation pixel operation section 42 applies a simple interpolation processing different from the case of a luminance signal to the pixel data of a color signal component to generate HD pixels of a color signal. Thus, downsizing and cost reducing can be realized.

Abstract: An ADRC circuit 3 generates spatial classes with SD data extracted by an area extracting circuit 2. A moving class determining circuit 5 generates a moving class with SD data extracted by an area extracting circuit 4. A class code generating circuit 6 generates a class code with the spatial class and the moving class. A tap decreasing ROM 7 supplies additional code data for each class code to a tap decreasing code 10. The additional code data is used to decrease taps of SD data. The tap decreasing circuit 10 decreases the SD data extracted by an area extracting circuit 9. A prediction calculating circuit 11 receives coefficient data corresponding to the class code from a ROM table 8 and obtains HD data with the decreased SD data corresponding to a linear prediction equation.

Abstract: An integrated circuit formed on a single chip, such as a large-scale integration (LSI) chip, which enables a plurality of digital signal processing functions to be performed. A desired digital signal processing function may be selected from among the plurality of available processing functions by the use of a control signal or signals supplied from outside the LSI chip. The LSI chip may include input terminals t1, t2, and t2'; output terminals t3 and t4; and a control signal input terminal t5. Additionally, the LSI chip may further include class sorting circuits, delay and switching circuits, switching circuits, coefficient memories, filter operating circuits, a line delay circuit, and a product sum operating circuit.

Abstract: Lower accuracy picture coincidence detecting means gives positional relationship between picture data of higher resolution picture and lower resolution picture as corresponding pixel position predicted with marker position as reference, i.e., initial position. Block matching processing means sets a search range corresponding to a block of an arbitrary range set within the lower resolution picture in accordance with the initial position to globally search, within the search range, block on the higher resolution picture corresponding to the block of the arbitrary range to find out a candidate of coincidence area to further interpolate between respective pixels of lower resolution picture and higher resolution picture to thereby evaluate, with high accuracy, similarity between the set block and block within the search range to detect a picture in which coincidence is obtained.

Abstract: An amount-of-movement detection device which is capable of detecting the amount of movement with a high degree of accuracy when the amount of movement of an image is detected by hierarchical block matching method. An amount-of-movement detection device 1 forms image data S2.sub.n and S3.sub.n of plural hierarchies having different resolutions from each other, by input image S1.sub.n input at a first point in time, and forms multiplexed image data S2.sub.n-1 and S3.sub.n-1 of a higher hierarchy of low resolution, based on an input image S1.sub.n-1 input at a second point in time, by selecting pixels overlapping with each other from the image data of the lower hierarchy having higher resolution and reducing them in size, in order to detect a motion vector by block matching at a predetermined block unit for each of the hierarchies corresponding to the hierarchized image data S2.sub.n and S3.sub.n and the multiplexed and hierarchized image data S2.sub.n-1 and S3.sub.n-1.

Abstract: Apparatus are provided for producing a noise-reduced image signal from an input image signal having relatively more noise. The input image signal is divided into a number of block signals. A class code is produced for each of the block signals and used to produce low noise image data which is either output as a pixel or block of the noise-reduced image signal or is used to produce the same.

Abstract: In an apparatus for judging a hand movement of an image, pixels where absolute values of differences between image data of respective pixels of blocks of a current frame and image data of representative point pixels of blocks of an earlier frame read out from a representative point memory satisfy a predetermined condition are judged by a condition judgment circuit to form a frequency distribution table corresponding to the judged result by a frequency distribution table formation circuit to calculate, on the basis of the frequency distribution table, the number of coordinates having a frequency value greater than a predetermined value in the vicinity of a coordinate designated by a motion vector of an image to judge the motion vector to result from a hand movement when the calculated value is less than a predetermined value.

Abstract: Apparatus and methods are provided for producing a zoomed image signal from an input image signal. The input image signal is separated into a number of block signals each representing a subarea of the input image. Class codes are produced based on the block signals. Each class code identifies predetermined image data of a zoomed image portion which corresponds to the subarea represented by the block signal on which the class code is based. The predetermined image data is generated in response to each class code. Shifted display positions are assigned for image data of the selected block signals, and the zoomed image signal is synthesized from the image data having shifted display positions and the predetermined image data such that the predetermined image data are assigned display positions intermediate the shifted display positions of the other data.