Patents by Inventor Takashi Ishihara

Takashi Ishihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250233351
    Abstract: In a connector, routing holes include an inclined surface in which a distance to an extension axis of a central axis of packing holes becomes closer from a first opening end toward a second opening end. A first end of a inclined surface at a position closest to the first opening end faces an interior of a housing body in a direction opposite to a first direction, and a second end of the inclined surface at a position closest to the second opening end forms a narrowest opening part in the routing holes.
    Type: Application
    Filed: January 8, 2025
    Publication date: July 17, 2025
    Applicant: Yazaki Corporation
    Inventors: Hiroki KITAGAWA, Shotaro SHIBATA, Motohide SATO, Kengo AOSHIMA, Takashi ISHIHARA, Narumi SUZUKI
  • Publication number: 20250233356
    Abstract: A connector connected to an external connector, comprising: a plurality of terminals; an electric wire lead-out portion for leading out a plurality of electric wires, partially joined to the terminals, in a first direction to be connected to the external connector; and a combination of a first electric wire contact and a second electric wire contact for partially clamping the electric wires extending in a second direction, intersecting with the first direction, between the terminals and the electric wire lead-out portion. The first electric wire contact is integrated with a member having the electric wire lead-out portion.
    Type: Application
    Filed: January 7, 2025
    Publication date: July 17, 2025
    Applicant: Yazaki Corporation
    Inventors: Hiroki KITAGAWA, Shotaro SHIBATA, Motohide SATO, Kengo AOSHIMA, Takashi ISHIHARA, Narumi SUZUKI
  • Publication number: 20250132508
    Abstract: A terminal-equipped electric wire is formed by joining a terminal and a core wire exposed from an insulation sheath of an electric wire by method of ultrasonic joining, and the terminal includes a joining portion having a square shape or a round shape in plan view, to which a distal end portion of the core wire is joined. When the joining portion has a square shape, a longitudinal direction of the electric wire is orthogonal to a longitudinal direction of the terminal.
    Type: Application
    Filed: October 15, 2024
    Publication date: April 24, 2025
    Applicant: Yazaki Corporation
    Inventors: Tomoaki HAYAKAWA, Hiroki Kitagawa, Shotaro Shibata, Motohide Sato, Kengo Aoshima, Narumi Suzuki, Takashi Ishihara
  • Patent number: 12282109
    Abstract: A position detecting system includes receivers and a control unit. The four receivers are attached at positions different from one another in the circumferential direction of a pillar extending in the vertical direction. Each of first areas, which expands in the circumferential direction of the pillar, is an area in which the corresponding three receivers among the receivers receive radio waves from a transmitter directly, and is an area in which the remaining one receiver does not receive radio waves from the transmitter directly. Each of second areas is an area in which the corresponding two receivers among the receivers receive radio waves from the transmitter directly, and is an area in which the remaining two receivers do not receive radio waves from the transmitter directly. The control unit calculates the position of the transmitter by using different position computational algorithms for the first areas and the second areas.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: April 22, 2025
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Takashi Ishihara
  • Publication number: 20240413195
    Abstract: A semiconductor device including a substrate; a first active region disposed in the substrate, the first active region having one or more first type channels and a first plurality of doped regions; a second active region disposed in the substrate, the second active region having one or more second type channels and a second plurality of doped regions, the second active region being physically separated from the first active region by a STI region; an intermediate wiring layer disposed above the substrate, the intermediate wiring layer having a plurality of fingers connected to the first plurality of doped regions and the second plurality of doped regions, respectively; and a metal wiring layer having a source finger and a drain finger, wherein the source finger is connected to a first group of the plurality of fingers, and the drain finger is connected to a second group of the plurality of fingers.
    Type: Application
    Filed: May 18, 2024
    Publication date: December 12, 2024
    Inventor: Takashi Ishihara
  • Publication number: 20240100504
    Abstract: A synthetic adsorbent, where a maximum value of a differential pore volume under a pressure condition of 0.5 to 30.0 psia is greater than 0.05 mL/g. A method of measuring the differential pore volume includes reducing a pressure in a sample container where the synthetic adsorbent that has been dried is placed to 10 Pa or less, mercury is degassed by reducing the pressure to 10 Pa or less, and the sample container is filled with the mercury at a pressure of 0.5 psia, measuring a mercury intrusion amount when the pressure in the sample container filled with the mercury is increased from 0.5 to 30.0 psia, and calculating the differential pore volume by dividing an amount of an increase in the mercury intrusion amount when a first-stage pressure calculated based on the mercury intrusion amount measured in the measuring is increased, by a measured amount of the synthetic adsorbent.
    Type: Application
    Filed: December 8, 2023
    Publication date: March 28, 2024
    Applicants: Mitsubishi Chemical Corporation, Kyowa Kirin Co., Ltd.
    Inventors: Yoshiya TASHIRO, Shouhei OHARA, Jun TAKEHARA, Takashi ISHIHARA, Shinsuke KIKUCHI
  • Publication number: 20230389760
    Abstract: A surface-cleaning apparatus (1) includes: a main-body housing (2); a suction motor (6), which is housed in the main-body housing and is driven to recover a cleaning liquid from a surface of a cleaning target; a first tank (3), which houses the cleaning liquid to be supplied to the surface of the cleaning target; and a second tank (4), which houses the cleaning liquid recovered from the surface of the cleaning target. One tank of the first tank and the second tank is connected to an upper portion of the main-body housing. The other tank of the first tank and the second tank is connected to a lower portion of the main-body housing and has a lower surface (4A) that opposes a stationary surface on which the surface-cleaning apparatus is disposed.
    Type: Application
    Filed: May 15, 2023
    Publication date: December 7, 2023
    Inventors: Kosuke KOMIYA, Takayuki TAHARA, Takashi ISHIHARA
  • Publication number: 20230389766
    Abstract: A surface-cleaning apparatus (1) includes: a main-body housing (2); a suction motor (6), which is housed in the main-body housing and is driven to recover a cleaning liquid from a surface of a cleaning target; a first tank (3), which houses the cleaning liquid to be supplied to the surface of the cleaning target; and a second tank (4), which houses the cleaning liquid recovered from the surface of the cleaning target. One tank of the first tank and the second tank has a tank-recessed portion (22) that is recessed from a portion of a surface of the one tank. The other tank of the first tank and the second tank has a lower surface (4A) that opposes a stationary surface on which the surface-cleaning apparatus sits.
    Type: Application
    Filed: May 15, 2023
    Publication date: December 7, 2023
    Inventors: Kosuke KOMIYA, Takayuki TAHARA, Takashi ISHIHARA
  • Patent number: 11764571
    Abstract: Disclosed herein is an apparatus that includes a first power ESD protection circuit arranged in a first circuit area; a plurality of data I/O circuits arranged in a second circuit area adjacent to the first circuit area in a first direction; a plurality of data I/O terminals arranged in the second circuit area, each of the plurality of data I/O terminals being coupled to an associated one of the plurality of data I/O circuits; a plurality of first power terminals arranged in the second circuit area; and a first power line extending in the first direction, the first power line coupling the plurality of first power terminals to the first power ESD protection circuit.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: September 19, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Haruka Momota, Takashi Ishihara
  • Patent number: 11742281
    Abstract: A semiconductor device may include a multi-level wiring structure comprising a first-level wiring layer, a second-level wiring layer and an insulating layer between the first-level wiring layer and the second-level wiring layer. The device may also include a bond pad, a first wiring extending from the bond pad, and a second wiring overlapping at least in part with the first wiring through the insulating layer to be capacitively coupled to the first wiring. The first wiring and the second wiring may each be formed respectively as the first-level wiring layer and the second-level wiring layer. The device may also include a protection circuit configured to be DC coupled to the second wiring. The first-level wiring layer may include a redistribution layer (RDL).
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: August 29, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Takashi Ishihara, Wataru Nobehara
  • Patent number: 11742306
    Abstract: Layouts for pads and conductive lines of memory devices are disclosed. A memory device may include memory cells and conductive lines arranged above memory cells. The conductive lines may extend from substantially a first side of the memory device to substantially a second side of the memory device. Each of the conductive lines may be electrically coupled to a bond pad, a first probe pad and a second probe pad. The bond pad may be positioned at or near the first side and be configured to receive power. The first probe pad may be positioned at or near the first side and be configured to be electrically coupled to a probe. The second probe pad may be positioned at or near the second side. Associated systems and methods are also disclosed.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: August 29, 2023
    Assignee: Micron Technology, Inc.
    Inventor: Takashi Ishihara
  • Patent number: 11678051
    Abstract: A control method of an image pickup device is provided. The image pickup device includes a camera, a display, and a touch panel that is overlapped with the display and detects at least a sliding touch operation. The display displays a video image captured by the camera in first, second and third modes. The control method includes: switching to the second mode by a first sliding touch operation in a first direction on the touch panel in the first mode; switching to the third mode by a second sliding touch operation in the first direction in the second mode; switching to the second mode by a third sliding touch operation in a second direction in the third mode; and switching to the first mode by a fourth sliding touch operation in the second direction in the second mode. The second direction is substantially opposite to the first direction.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: June 13, 2023
    Assignee: PANASONIC HOLDINGS CORPORATION
    Inventors: Takashi Ishihara, Kazutaka Yamamoto, Katsuyuki Ito
  • Publication number: 20220324945
    Abstract: An object of the present invention is to provide, as a method for producing an antibody at a lower cost than the prior art, a method for purifying an antibody in a non-adsorption mode using an inorganic compound containing silicon dioxide and aluminum oxide, a method for producing an antibody comprising the purification method, and an antibody produced by the production method, and the like. The present invention relates to a method for purifying an antibody in a non-adsorption mode using an inorganic compound containing silicon dioxide and aluminum oxide, a method for producing an antibody comprising the purification method, and an antibody produced by the production method.
    Type: Application
    Filed: July 29, 2020
    Publication date: October 13, 2022
    Applicant: Kyowa Kirin Co., Ltd.
    Inventors: Yasunari ESHIMA, Takashi ISHIHARA
  • Publication number: 20220216168
    Abstract: Layouts for pads and conductive lines of memory devices are disclosed. A memory device may include memory cells and conductive lines arranged above memory cells. The conductive lines may extend from substantially a first side of the memory device to substantially a second side of the memory device. Each of the conductive lines may be electrically coupled to a bond pad, a first probe pad and a second probe pad. The bond pad may be positioned at or near the first side and be configured to receive power. The first probe pad may be positioned at or near the first side and be configured to be electrically coupled to a probe. The second probe pad may be positioned at or near the second side. Associated systems and methods are also disclosed.
    Type: Application
    Filed: February 19, 2021
    Publication date: July 7, 2022
    Inventor: Takashi Ishihara
  • Publication number: 20220159186
    Abstract: A control method of an image pickup device is provided. The image pickup device includes a camera, a display, and a touch panel that is overlapped with the display and detects at least a sliding touch operation. The display displays a video image captured by the camera in first, second and third modes. The control method includes: switching to the second mode by a first sliding touch operation in a first direction on the touch panel in the first mode; switching to the third mode by a second sliding touch operation in the first direction in the second mode; switching to the second mode by a third sliding touch operation in a second direction in the third mode; and switching to the first mode by a fourth sliding touch operation in the second direction in the second mode. The second direction is substantially opposite to the first direction.
    Type: Application
    Filed: February 4, 2022
    Publication date: May 19, 2022
    Applicant: PANASONIC CORPORATION
    Inventors: Takashi ISHIHARA, Kazutaka YAMAMOTO, Katsuyuki ITO
  • Publication number: 20220141385
    Abstract: A configuration is implemented that can adjust a stroke of an operation section of a switch required to cause predetermined processing to be executed. The present disclosure includes an operation section that can move in a predetermined direction from an initial position by a user operation, a position adjustment section that adjusts, in the predetermined direction, an amount of movement of the operation section from the initial position to a detection position, a position detection section that detects a position of the operation section with respect to the detection position, and a control section that controls execution of processing corresponding to the detection position based on a detection result from the position detection section.
    Type: Application
    Filed: February 20, 2020
    Publication date: May 5, 2022
    Inventor: TAKASHI ISHIHARA
  • Publication number: 20220123550
    Abstract: Disclosed herein is an apparatus that includes a first power ESD protection circuit arranged in a first circuit area; a plurality of data I/O circuits arranged in a second circuit area adjacent to the first circuit area in a first direction; a plurality of data I/O terminals arranged in the second circuit area, each of the plurality of data I/O terminals being coupled to an associated one of the plurality of data I/O circuits; a plurality of first power terminals arranged in the second circuit area; and a first power line extending in the first direction, the first power line coupling the plurality of first power terminals to the first power ESD protection circuit.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 21, 2022
    Inventors: Haruka Momota, Takashi Ishihara
  • Patent number: 11272104
    Abstract: A control method of an image pickup device is provided. The image pickup device includes a camera, a display, and a touch panel that is overlapped with the display and detects at least a sliding touch operation. The display displays a video image captured by the camera in first, second and third modes. The control method includes: switching to the second mode by a first sliding touch operation in a first direction on the touch panel in the first mode; switching to the third mode by a second sliding touch operation in the first direction in the second mode; switching to the second mode by a third sliding touch operation in a second direction in the third mode; and switching to the first mode by a fourth sliding touch operation in the second direction in the second mode. The second direction is substantially opposite to the first direction.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: March 8, 2022
    Assignee: PANASONIC CORPORATION
    Inventors: Takashi Ishihara, Kazutaka Yamamoto, Katsuyuki Ito
  • Patent number: 11159913
    Abstract: The position of a transmission device is estimated with a sufficient accuracy. A position estimation system includes a transmission device that includes a plurality of transmitters arranged symmetrically with respect to a specific reference position, a plurality of receivers that receive radio waves transmitted from the plurality of transmitters, and an estimation tool that estimates the position of the transmission device, based on reception strengths of the radio waves received at the receivers.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: October 26, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akira Nakazawa, Takashi Ishihara
  • Patent number: 11101265
    Abstract: Apparatuses including circuit layout regions of a semiconductor device and methods of designing the circuit layout regions of a semiconductor device are described. An example apparatus includes a first layout region including a first transistor area including at least one first transistor, at least one contact in proximity to the first transistor area, and a first resistor area comprising at least one first resistor coupled to the at least one first transistor. The first transistor area and the at least one contact are aligned in a first direction, and the first transistor area and the first resistor area are aligned in a second direction. The second direction may be substantially perpendicular to the first direction. The at least one contact may be one of a substrate contact and a well contact.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: August 24, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Yasuhiko Tanuma, Takashi Ishihara