Abstract: In a conveyance equipment having a conveyance path which serves to convey paper or the like, and an introduction path which merges with the conveyance path, for guiding to the conveyance path the paper or the like to be introduced into the conveyance system, the paper or the like is conveyed in a state in which it is erected within the conveyance path while being sandwiched in between conveyance members; a conveyance equipment for paper or the like is so constructed that means for separating and excluding foreign matter is formed at a bottom of the conveyance path. Also, a paper money collection system in a game island is constructed using the conveyance equipment.

Abstract: There are SIMD type parallel data processing systems having a single instruction stream and multiple data streams and MIMD type parallel data processing systems having multiple instruction and data streams in the parallel data processing field for performing high-speed data processing. They have both merits and demerits and each have their suitable application fields. Because of this, it is extremely difficult to cover a wide range of application fields with either one of the systems. Then, a SIMD type parallel processing unit (50) and a MIMD type parallel data processing unit (51) are connected to each other by a common bus (41) and a memory (42), and a system controller (43) is provided to allow each of the parallel data processing units to perform its suitable processings, thus making it possible to apply the optimum parallel processing system to a wide range of application fields.

Abstract: A semiconductor rectifier having a high breakdown voltage and a high speed operation is provided, which comprises a semiconductor substrate including a first semiconductor layer of one conductivity type and a second semiconductor layer of one conductivity type provided on the first semiconductor layer, a third semiconductor layer of an opposite conductivity type having a depth D and formed in the second semiconductor layer to provide a pn junction therebetween, the third semiconductor layer defining a plurality of exposed regions of the second semiconductor layer, each of the plurality of exposed regions of the second semiconductor layer having a width W, a relation between the depth D and the width W being given by D.gtoreq.0.5W, and a metal electrode provided on the substrate surface.