Patents by Inventor Takashi Kataigi
Takashi Kataigi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11456189Abstract: A member for semiconductor manufacturing apparatuses, which includes a ceramic electrostatic chuck and a cooling plate bonded together with a thermosetting sheet, is provided. The thermosetting sheet is made of a cured epoxy-acrylic adhesive. The adhesive contains (A) an epoxy resin capable of hydrogen transfer type polyaddition, (B) an acrylate or methacrylate polymer, and (C) a curing agent.Type: GrantFiled: March 3, 2014Date of Patent: September 27, 2022Assignee: NGK Insulators, Ltd.Inventors: Kazuma Ohba, Tetsuya Kawajiri, Takashi Kataigi
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Patent number: 11282734Abstract: An electrostatic chuck includes a first ceramic member disk-shaped and having an annular step surface outside a circular wafer holding surface thereof, the annular step surface being at a lower level than the wafer holding surface, the first ceramic member having a volume resistivity that allows Coulomb force to be exerted; a first electrode embedded in the first ceramic member at a position facing the wafer holding surface; a second electrode disposed on the annular step surface of the first ceramic member, the second electrode being independent of the first electrode; and a second ceramic member having an annular shape and configured to cover the annular step surface having the second electrode thereon, the second ceramic member having a volume resistivity that allows Johnsen-Rahbek force to be exerted, wherein an upper surface of the second ceramic member is a focus ring holding surface on which a focus ring is placed.Type: GrantFiled: December 17, 2019Date of Patent: March 22, 2022Assignee: NGK Insulators, Ltd.Inventors: Tatsuya Kuno, Ikuhisa Morioka, Takashi Kataigi, Kenichiro Aikawa
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Publication number: 20200126837Abstract: An electrostatic chuck includes a first ceramic member disk-shaped and having an annular step surface outside a circular wafer holding surface thereof, the annular step surface being at a lower level than the wafer holding surface, the first ceramic member having a volume resistivity that allows Coulomb force to be exerted; a first electrode embedded in the first ceramic member at a position facing the wafer holding surface; a second electrode disposed on the annular step surface of the first ceramic member, the second electrode being independent of the first electrode; and a second ceramic member having an annular shape and configured to cover the annular step surface having the second electrode thereon, the second ceramic member having a volume resistivity that allows Johnsen-Rahbek force to be exerted, wherein an upper surface of the second ceramic member is a focus ring holding surface on which a focus ring is placed.Type: ApplicationFiled: December 17, 2019Publication date: April 23, 2020Applicant: NGK INSULATORS, LTD.Inventors: Tatsuya Kuno, Ikuhisa Morioka, Takashi Kataigi, Kenichiro Aikawa
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Patent number: 9583372Abstract: A member for semiconductor manufacturing device includes a susceptor which is a ceramic plate formed of AlN and a gas introduction pipe which is joined to the susceptor. An annular pipe joining bank is provided at a position of the susceptor facing a flange of the gas introduction pipe. In addition, a pipe brazed part is formed between the flange and the pipe joining bank. The flange has a width of 3 mm or more and a thickness of from 0.5 to 2 mm. It is preferable that the height of the pipe joining bank be 0.5 mm or more, the edge of the bank facing the outer edge of the flange. be chamfered as designated by C0.3 or more or rounded as designated by R0.3 or more.Type: GrantFiled: December 10, 2015Date of Patent: February 28, 2017Assignee: NGK Insulators, Ltd.Inventors: Takashi Kataigi, Takashi Tanimura
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Patent number: 9438140Abstract: A member for a semiconductor manufacturing apparatus includes an electrostatic chuck, a cooling unit, a spacer (an O-ring, an outer periphery spacer, or the like) for securing a gap placed between the electrostatic chuck and the cooling unit, and a clamp ring placed on the upper surface of the outer periphery of the electrostatic chuck. The clamp ring is fastened to the cooling unit with screws. The screws are inserted into coil springs that prevent loosening, and are fastened to nuts. The coil springs are attached not to the clamp ring side but to the cooling unit side.Type: GrantFiled: April 25, 2013Date of Patent: September 6, 2016Assignee: NGK Insulators, Ltd.Inventors: Hideaki Takasaki, Takashi Kataigi
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Patent number: 9432673Abstract: Disclosed herein is an image processing device including: an acquisition section adapted to acquire coded data and control the output or recording of the coded data; a generation section adapted to generate image data; a coding section adapted to generate the coded data by coding the generated image data in response to an output request from the acquisition section; an output section adapted to output the generated coded data to the acquisition section; and a control section adapted to determine, based on the generated coded data, the sizes of vertical and horizontal synchronizing signals used to output the coded data to the acquisition section, notify the determined sizes to the acquisition section, and control the output section to output the coded data according to the vertical and horizontal synchronizing signals of the determined sizes after the notification.Type: GrantFiled: September 12, 2011Date of Patent: August 30, 2016Assignee: Sony CorporationInventors: Takao Ino, Takashi Kataigi, Masanobu Nishimura
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Publication number: 20160099164Abstract: A member for semiconductor manufacturing device includes a susceptor 10 which is a ceramic plate formed of AlN and a gas introduction pipe 20 which is joined to the susceptor 10. An annular pipe joining bank 14 is provided at a position of the susceptor 10 facing a flange 22 of the gas introduction pipe 20. In addition, a pipe brazed part 24 is formed between the flange 22 and the pipe joining bank 14. The flange 22 has a width of 3 mm or more and a thickness of from 0.5 to 2 mm. It is preferable that the height of the pipe joining bank 14 be 0.5 mm or more, the edge of the bank facing the outer edge of the flange 22 be chamfered as designated by C0.3 or more or rounded as designated by R0.3 or more.Type: ApplicationFiled: December 10, 2015Publication date: April 7, 2016Inventors: Takashi KATAIGI, Takashi TANIMURA
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Patent number: 9257315Abstract: A member for a semiconductor manufacturing apparatus includes an AlN electrostatic chuck, a cooling plate, and a cooling plate-chuck bonding layer. The cooling plate includes first to third substrates, a first metal bonding layer between the first and second substrates, a second metal bonding layer between the second and third substrates, and a refrigerant path. The first to third substrates are formed of a dense composite material containing SiC, Ti3SiC2, and TiC. The metal bonding layers are formed by thermal compression bonding of the substrates with an Al—Si—Mg metal bonding material interposed between the first and second substrates and between the second and third substrates.Type: GrantFiled: October 16, 2014Date of Patent: February 9, 2016Assignee: NGK Insulators, Ltd.Inventors: Asumi Jindo, Katsuhiro Inoue, Yuji Katsuda, Takashi Kataigi, Shingo Amano, Hiroya Sugimoto
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Patent number: 9255747Abstract: A member for a semiconductor manufacturing apparatus includes an alumina electrostatic chuck, a cooling plate, and a cooling plate-chuck bonding layer. The cooling plate includes first to third substrates, a first metal bonding layer between the first and second substrates, a second metal bonding layer between the second and third substrates, and a refrigerant path. The first to third substrates are formed of a dense composite material containing Si, SiC, and Ti. The metal bonding layers are formed by thermal compression bonding of the substrates with an Al—Si—Mg or Al—Mg metal bonding material interposed between the first and second substrates and between the second and third substrates.Type: GrantFiled: October 16, 2014Date of Patent: February 9, 2016Assignee: NGK Insulators, Ltd.Inventors: Asumi Jindo, Katsuhiro Inoue, Yuji Katsuda, Takashi Kataigi, Shingo Amano, Hiroya Sugimoto
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Patent number: 9165813Abstract: In a semiconductor manufacturing apparatus member, paths that may become a discharge path between a wafer and a cooling device are a first path and a second path. The first path is the shortest path from a hole to a hole across a plug. The length of the first path is larger than the thickness of the plug. The second path is the shortest path that extends from one of holes to an outer peripheral surface of the plug along an adhesive layer, and the shortest path from a hole in a bonding sheet to the outer peripheral surface of the plug along the bonding sheet. The sum of the lengths of these respective paths is larger than the thickness of the plug.Type: GrantFiled: April 24, 2013Date of Patent: October 20, 2015Assignee: NGK Insulators, Ltd.Inventors: Takashi Kataigi, Takashi Tanimura
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Publication number: 20150077895Abstract: A member 10 for a semiconductor manufacturing apparatus includes an alumina electrostatic chuck 20, a cooling plate 30, and a cooling plate-chuck bonding layer 40. The cooling plate 30 includes first to third substrates 31 to 33, a first metal bonding layer 34 between the first and second substrates 31 and 32, a second metal bonding layer 35 between the second and third substrates 32 and 33, and a refrigerant path 36. The first to third substrates 31 to 33 are formed of a dense composite material containing Si, SiC, and Ti. The metal bonding layers 34 and 35 are formed by thermal compression bonding of the substrates 31 to 33 with an Al—Si—Mg or Al—Mg metal bonding material interposed between the first and second substrates 31 and 32 and between the second and third substrates 32 and 33.Type: ApplicationFiled: October 16, 2014Publication date: March 19, 2015Inventors: Asumi JINDO, Katsuhiro INOUE, Yuji KATSUDA, Takashi KATAIGI, Shingo AMANO, Hiroya SUGIMOTO
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Publication number: 20150036261Abstract: A member 10 for a semiconductor manufacturing apparatus includes an AlN electrostatic chuck 20, a cooling plate 30, and a cooling plate-chuck bonding layer 40. The cooling plate 30 includes first to third substrates 31 to 33, a first metal bonding layer 34 between the first and second substrates 31 and 32, a second metal bonding layer 35 between the second and third substrates 32 and 33, and a refrigerant path 36. The first to third substrates 31 to 33 are formed of a dense composite material containing SiC, Ti3 SiC2, and TiC. The metal bonding layers 34 and 35 axe formed by thermal compression bonding of the substrates 31 to 33 with an Al—Si—Mg metal bonding material interposed between the first and second substrates 31 and 32 and between the second and third substrates 32 and 33.Type: ApplicationFiled: October 16, 2014Publication date: February 5, 2015Inventors: Asumi JINDO, Katsuhiro INOUE, Yuji KATSUDA, Takashi KATAIGI, Shingo AMANO, Hiroya SUGIMOTO
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Publication number: 20140272421Abstract: A member 10 for semiconductor manufacturing apparatuses, which includes an aluminum electrostatic chuck 12 and a cooling plate 14 bonded together with a thermosetting sheet 16, is provided. The thermosetting sheet 16 is made of a cured epoxy-acrylic adhesive. The adhesive contains (A) an epoxy resin capable of hydrogen transfer type polyaddition, (B) an acrylate or methacrylate polymer, and (C) a curing agent.Type: ApplicationFiled: March 3, 2014Publication date: September 18, 2014Applicant: NGK Insulators, Ltd.Inventors: Kazuma OHBA, Tetsuya KAWAJIRI, Takashi KATAIGI
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Publication number: 20130286532Abstract: In a semiconductor manufacturing apparatus member 10, paths that may become a discharge path between a wafer W and a cooling device 40 are a first path R1 and a second path R2. The path R1 is the shortest path from a hole 34a to a hole 42 across a plug 36. The length of the path R1 is larger than the thickness of the plug 36. The path R2 is a path that extends from one of holes 34 to an outer peripheral surface of the plug 36 along an adhesive layer 38 along the shortest path (portion R2a), then to a bonding sheet 50 along the outer peripheral surface, and to a hole 42 along the bonding sheet 50 along the shortest path (portion R2b). The sum of the lengths of these portions (R2a+R2b) is larger than the thickness of the plug 36.Type: ApplicationFiled: April 24, 2013Publication date: October 31, 2013Inventors: Takashi KATAIGI, Takashi TANIMURA
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Publication number: 20130286533Abstract: A member 10 for a semiconductor manufacturing apparatus includes an electrostatic chuck 20, a cooling unit 40, a spacer (an O-ring 44, an outer periphery spacer 58, or the like) for securing a gap 48 placed between the electrostatic chuck 20 and the cooling unit 40, and a clamp ring 50 placed on the upper surface of the outer periphery of the electrostatic chuck 20. The clamp ring 50 is fastened to the cooling unit 40 with screws 60. The screws 60 are inserted into coil springs 66 that prevent loosening, and are fastened to nuts 68. The coil springs 66 are attached not to the clamp ring side but to the cooling unit side.Type: ApplicationFiled: April 25, 2013Publication date: October 31, 2013Applicant: NGK INSULATORS, LTD.Inventors: Hideaki TAKASAKI, Takashi KATAIGI
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Patent number: 8540819Abstract: A ceramic heater for a semiconductor substrate process includes a plate and a shaft. The plate includes a first base and a second base bonded to the first base. Defined on a mounting surface of the first base are: a first region having a surface contacting with a mounted substrate; a purge groove provided in the portion covered with the substrate and surrounds the first region; and a second region having a surface surrounding the purge groove. The first base has: an adsorber configured to adsorb the mounted substrate onto the surface of the first region; and multiple purge holes each penetrating from the bottom surface of the purge groove to the lower surface of the first base. The purge groove is supplied with a purge gas through the multiple purge holes. The surface of the second region is located lower than that of the first region.Type: GrantFiled: March 19, 2009Date of Patent: September 24, 2013Assignee: NGK Insulators, Ltd.Inventors: Takashi Kataigi, Yuji Akatsuka
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Publication number: 20120092506Abstract: Disclosed herein is an image processing device including: an acquisition section adapted to acquire coded data and control the output or recording of the coded data; a generation section adapted to generate image data; a coding section adapted to generate the coded data by coding the generated image data in response to an output request from the acquisition section; an output section adapted to output the generated coded data to the acquisition section; and a control section adapted to determine, based on the generated coded data, the sizes of vertical and horizontal synchronizing signals used to output the coded data to the acquisition section, notify the determined sizes to the acquisition section, and control the output section to output the coded data according to the vertical and horizontal synchronizing signals of the determined sizes after the notification.Type: ApplicationFiled: September 12, 2011Publication date: April 19, 2012Applicant: Sony CorporationInventors: Takao Ino, Takashi Kataigi, Masanobu Nishimura
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Publication number: 20090235866Abstract: A ceramic heater for a semiconductor substrate process includes a plate and a shaft. The plate includes a first base and a second base bonded to the first base. Defined on a mounting surface of the first base are: a first region having a surface contacting with a mounted substrate; a purge groove provided in the portion covered with the substrate and surrounds the first region; and a second region having a surface surrounding the purge groove. The first base has: an adsorber configured to adsorb the mounted substrate onto the surface of the first region; and multiple purge holes each penetrating from the bottom surface of the purge groove to the lower surface of the first base. The purge groove is supplied with a purge gas through the multiple purge holes. The surface of the second region is located lower than that of the first region.Type: ApplicationFiled: March 19, 2009Publication date: September 24, 2009Applicant: NGK Insulators, Ltd.Inventors: Takashi Kataigi, Yuji Akatsuka
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Patent number: 5572468Abstract: After a row address and a column address are supplied to a dynamic RAM in response to a row address strobe signal and a column address strobe signal, respectively, a high impedance state is maintained for column address access time period after the fall timing of the column address strobe signal, thereafter data is outputted to a data bus, and the high impedance state of the data bus is quickly resumed after the rise timing of the column address strobe signal. If different column addresses of RAM at the same row address are successively read, data are read and outputted to the data bus in response to a change only in the column address strobe signal, and thereafter, even after the high impedance state of the data bus is quickly resumed, a data value is held by the data bus until the dynamic RAM outputs the data.Type: GrantFiled: May 3, 1995Date of Patent: November 5, 1996Assignee: Hitachi, Ltd.Inventors: Iwao Ishinabe, Tadashi Saito, Takashi Kataigi, Yoshinobu Igarashi, Yukiko Midorikawa