Patents by Inventor Takashi Katsuyama

Takashi Katsuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit and method for manufacturing the same
    Patent number: 7667316
    Abstract: A semiconductor integrated circuit includes a power transistor formed on a semiconductor substrate, a plurality of first metal patterns and a plurality of second metal patterns which are formed right above the power transistor and function as a first electrode and as a second electrode of the power transistor, respectively, a plurality of first buses each electrically connected with, of a plurality of first metal patterns, a corresponding first metal pattern, a plurality of second buses each electrically connected with, of a plurality of second metal patterns, a corresponding second metal pattern, wherein one contact pad is provided to each of a plurality of first buses and a plurality of second buses.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 23, 2010
    Assignee: Panasonic Corporation
    Inventors: Shingo Fukamizu, Yutaka Nabeshima, Takashi Katsuyama
  • Semiconductor integrated circuit and method for manufacturing the same
    Publication number: 20080099783
    Abstract: A semiconductor integrated circuit includes a power transistor formed on a semiconductor substrate, a plurality of first metal patterns and a plurality of second metal patterns which are formed right above the power transistor and function as a first electrode and as a second electrode of the power transistor, respectively, a plurality of first buses each electrically connected with, of a plurality of first metal patterns, a corresponding first metal pattern, a plurality of second buses each electrically connected with, of a plurality of second metal patterns, a corresponding second metal pattern, wherein one contact pad is provided to each of a plurality of first buses and a plurality of second buses.
    Type: Application
    Filed: October 30, 2007
    Publication date: May 1, 2008
    Inventors: Shingo Fukamizu, Yutaka Nabeshima, Takashi Katsuyama