Abstract: Vertical type field effect transistors are disclosed including one of the highly doped source, gate and drain regions disposed on one of the main opposite faces of one of the semiconductor substrate and the remaining region or regions disposed on the other mainface of the substrate. At least one of the regions is divided into a plurality of elongated slender portions and metallic electrodes are disposed in ohmic contact with the respective regions so as to be identical in configuration to the latter. The highly doped regions themselves may form electrodes.

Abstract: A process of manufacturing a static induction thyristor comprising providing a semiconductor substrate of the first conductivity type which defines a first semiconductor layer and forming a second semiconductor layer thereon of a second conductivity type. The first and second semiconductor layers have relative impurity concentrations effective for forming therebetween charge depletion regions when no electrical signal is applied to the second semiconductor layer and which prevent injection of charge carriers through the second semiconductor layer when the thyristor is in a blocking state, and such that electrically forward biasing the second semiconductor layer effectuates a sufficient reduction of the depletion regions that a sufficient quantity of charge carriers may be injected through the second semiconductor layer that the thryistor switches to a conductive state. The second semiconductor layer defines the gate region of the thyristor.

Abstract: The disclosed thyristor comprises an n.sup.- semi-conductor layer, a p.sup.- semiconductor layer disposed on one surface of the n.sup.- layer to form a pn junction between them, an n.sup.+ and a p.sup.+ semiconductor layer disposed on the other surfaces of the n.sup.- and p.sup.- layers respectively to serve as main electrodes and a p.sup.+ and a n.sup.+ apertured gate layers disposed within the n.sup.- and p.sup.- layers respectively and provided with a gate electrode. An intrinsic semiconductor layer may be substituted for the n.sup.- and p.sup.- layers. A process of producing such a thyristor is also disclosed.