Abstract: An initialization setting circuit (20) is adapted to set an initial condition of a latch circuit in a semiconductor device upon ON-set of the power supply, comprises a detecting circuit (TR1, TR2, R, 21) responsive to ON-set of power supply to detect the power source voltage (Vcc) reaching a given voltage, and an output level control circuit (22) responsive to the detecting signal output from the detecting circuit, for elevating up the level of an output signal of the initialization setting circuit to a high potential level or lowering the level of the output signal of the initialization setting circuit to a low potential level. By supplying the output signal controlled by said output level control circuit of the latch circuit as the power source voltage; the operation of the latch circuit is synchronized when the power source voltage is shut down, and a malfunction can be successfully prevented upon resetting of the power supply.