Patents by Inventor Takashi Kuchiyama

Takashi Kuchiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11125612
    Abstract: A photoelectric conversion element for detecting the spot size of incident light. The photoelectric conversion element includes a photoelectric conversion substrate having two principal surfaces, and the substrate includes a first sensitivity part and a second sensitivity part that are separated from each other. When a sensitivity area appearing on the principal surface of the first sensitivity part is defined as a first sensitivity area and a sensitivity area appearing on the principal surface of the second sensitivity part is defined as a second sensitivity area, the first sensitivity area receives at least a portion of incident light incident on a light receiving surface, and a pattern is formed such that an increase in an irradiation area of the principal surface irradiated with the incident light reduces the ratio of the first sensitivity area to the second sensitivity area in the irradiation area.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: September 21, 2021
    Assignee: KANEKA CORPORATION
    Inventors: Kunta Yoshikawa, Takashi Kuchiyama
  • Publication number: 20210151631
    Abstract: A transparent electrode-equipped substrate includes, on a film base material having a transparent film substrate, a non-crystalline transparent foundation oxide layer and a non-crystalline transparent conductive oxide layer. The transparent electrode-equipped substrate is capable of achieving low resistivity by having the transparent oxide layers being formed sequentially from the film base material side through sputtering such that the absolute value of a discharge voltage (VU) of a direct-current (DC) power supply when forming the transparent foundation oxide layer is 255-280 V, the ratio (VU/VC) between the discharge voltage (VU) of the DC power supply when forming the transparent foundation oxide layer and the discharge voltage VC of the DC power supply when forming the transparent conductive oxide layer is 0.86-0.98.
    Type: Application
    Filed: January 29, 2021
    Publication date: May 20, 2021
    Applicant: KANEKA CORPORATION
    Inventor: Takashi KUCHIYAMA
  • Publication number: 20210111287
    Abstract: A photovoltaic device according to the present disclosure includes: a first-conductivity-type semiconductor film provided on a back side of a semiconductor substrate; a second-conductivity-type semiconductor film in which at least a part thereof is provided in a position different, in plan view, from a position of the first-conductivity-type semiconductor film on the back side of the semiconductor substrate; a protective film, which is formed on a back side of the first-conductivity-type semiconductor film and a back side of the second-conductivity-type semiconductor film, and which includes a conductive portion and a non-conductive transformed portion; and an electrode film formed on a back side of the conductive portion. The transformed portion of the protective film is provided along a conduction path between a back surface of the first-conductivity-type semiconductor film and a back surface of the second-conductivity-type semiconductor film.
    Type: Application
    Filed: December 22, 2017
    Publication date: April 15, 2021
    Inventors: Kunihiro NAKANO, Kunta YOSHIKAWA, Takashi KUCHIYAMA
  • Publication number: 20210057597
    Abstract: A method for manufacturing a solar cell includes: forming a first semiconductor layer of a first conductivity type on and over one of two major surfaces facing each other on a crystal substrate; forming a lift-off layer on and over the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of a second conductivity type on and over the major surface having the lift-off layer and the first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution; and washing the crystal substrate by using a rinsing liquid.
    Type: Application
    Filed: November 5, 2020
    Publication date: February 25, 2021
    Applicant: KANEKA CORPORATION
    Inventors: Kunihiro NAKANO, Ryota MISHIMA, Katsunori KONISHI, Takashi KUCHIYAMA
  • Publication number: 20200411713
    Abstract: The method for manufacturing a solar cell includes: forming a first semiconductor layer of first conductivity type on a surface of a semiconductor substrate; forming a lift-off layer containing a silicon-based material on the first semiconductor layer; selectively removing the lift-off layer and first semiconductor layer; forming a second semiconductor layer of second conductivity type on a surface having the lift-off layer and first semiconductor layer; and removing the second semiconductor layer covering the lift-off layer by removing the lift-off layer using an etching solution.
    Type: Application
    Filed: August 21, 2020
    Publication date: December 31, 2020
    Inventors: Ryota MISHIMA, Kunihiro NAKANO, Katsunori KONISHI, Daisuke ADACHI, Takashi KUCHIYAMA, Kenji YAMAMOTO
  • Patent number: 10777709
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization dining a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: September 15, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Publication number: 20200203170
    Abstract: A patterning sheet, or the like, is suitable when a complex etching target is to be etched in a simple manner to produce an etched structure. This patterning sheet comprises a base sheet formed from an etching-solution permeable first polymer, and particles dispersed in the base sheet and formed from a second polymer, which absorbs and holds the etching solution.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 25, 2020
    Applicant: KANEKA CORPORATION
    Inventor: Takashi KUCHIYAMA
  • Publication number: 20200203540
    Abstract: A solar cell, such as a back contact solar cell that can be cut into an arbitrary shape, includes a semiconductor substrate; a first conductivity-type semiconductor layer and a second conductivity-type semiconductor layer, disposed on the back surface of the semiconductor substrate; first electrode layers corresponding to the first conductivity-type semiconductor layer, and a second electrode layer corresponding to the second conductivity-type semiconductor layer. The second electrode layer and the plurality of first electrode layers form a sea-island structure in which the first electrode layers are in the form of islands, while the second electrode layer is in the form of sea. This solar cell also includes a plate electrode which is arranged to face the back surface of the semiconductor substrate, and which is connected to the plurality of first electrode layers, while being not connected to the second electrode layer.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 25, 2020
    Applicant: KANEKA CORPORATION
    Inventors: Hisashi UZU, Takashi KUCHIYAMA, Kunta YOSHIKAWA
  • Publication number: 20200200599
    Abstract: A photoelectric conversion element for detecting the spot size of incident light. The photoelectric conversion element includes a photoelectric conversion substrate having two principal surfaces, and the substrate includes a first sensitivity part and a second sensitivity part that are separated from each other. When a sensitivity area appearing on the principal surface of the first sensitivity part is defined as a first sensitivity area and a sensitivity area appearing on the principal surface of the second sensitivity part is defined as a second sensitivity area, the first sensitivity area receives at least a portion of incident light incident on a light receiving surface, and a pattern is formed such that an increase in an irradiation area of the principal surface irradiated with the incident light reduces the ratio of the first sensitivity area to the second sensitivity area in the irradiation area.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 25, 2020
    Applicant: KANEKA CORPORATION
    Inventors: Kunta YOSHIKAWA, Takashi KUCHIYAMA
  • Publication number: 20200176628
    Abstract: A photoelectric conversion element for detecting the spot size of incident light. The photoelectric conversion element includes a photoelectric conversion substrate having two principal surfaces, and comprises a first sensitive part and a second sensitive part that have mutually different photoelectric conversion characteristics. When a sensitive region appearing in the principal surface of the first sensitive part is defined as a first sensitive region, and a sensitive region appearing in the principal surface of the second sensitive part is defined as a second sensitive region, the first sensitive region is configured to receive at least a portion of light incident on a light-receiving surface and to decrease, proportionally to enlargement in an irradiation region of the principal surface irradiated with the incident light, the ratio of the first sensitive region to the second sensitive region in the irradiation region.
    Type: Application
    Filed: February 7, 2020
    Publication date: June 4, 2020
    Applicant: KANEKA CORPORATION
    Inventors: Kunta YOSHIKAWA, Takashi KUCHIYAMA
  • Patent number: 10662521
    Abstract: A substrate with a transparent electrode which includes an amorphous transparent electrode layer on a transparent film substrate. When a bias voltage of 0.1 V is applied to the amorphous transparent electrode layer, the layer has continuous regions where a current value at a voltage-applied surface is 50 nA or more. Each of the continuous regions has an area of 100 nm2 or more and the number of the continuous regions is 50/?m2 or more. In one embodiment, the layer has a tin oxide content of 6.5% or more and 8% or less by mass. With respect to the substrate with a transparent electrode according to the present invention, the transparent electrode layer may be crystallized in a short period of time.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: May 26, 2020
    Assignee: KANEKA CORPORATION
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Kenji Yamamoto
  • Publication number: 20190207060
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization dining a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Application
    Filed: March 6, 2019
    Publication date: July 4, 2019
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Patent number: 10270010
    Abstract: Provided is a substrate with transparent electrode, which is capable of achieving both acceleration of crystallization during a heat treatment and suppression of crystallization under a normal temperature environment. In the substrate with transparent electrode, a transparent electrode thin-film formed of a transparent conductive oxide is formed on a film substrate. An underlayer that contains a metal oxide as a main component is formed between the film substrate and the transparent electrode thin-film. The underlayer and the transparent electrode thin-film are in contact with each other. The transparent electrode thin-film is amorphous, and the base layer is dielectric and crystalline.
    Type: Grant
    Filed: January 19, 2015
    Date of Patent: April 23, 2019
    Assignee: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Hironori Hayakawa, Hiroaki Ueda, Yuji Motohara, Kenji Yamamoto
  • Patent number: 10173393
    Abstract: A transparent electrode-equipped substrate includes a metal oxide transparent electrode layer on a transparent substrate. The average maximum curvature Ssc of the surface of the transparent electrode layer is preferably 5.4×10?4 nm?1 or less. For example, if the transparent electrode layer is subjected to a surface treatment by low discharge-power sputtering after deposition, the Ssc of the transparent electrode layer can be reduced. This transparent electrode-equipped substrate excels in close adhesion between the transparent electrode layer and a lead-out wiring line disposed on the transparent electrode layer. The transparent electrode layer is obtained by, for example, performing a transparent electrode deposition step of through the application of a first discharge power and then performing a surface treatment step through the application of a second discharge power.
    Type: Grant
    Filed: March 18, 2016
    Date of Patent: January 8, 2019
    Assignee: KANEKA CORPORATION
    Inventors: Hironori Hayakawa, Shinya Omoto, Takashi Kuchiyama
  • Patent number: 10138541
    Abstract: A resin substrate with a transparent electrode having a low resistance, and a manufacturing method thereof including: a deposition step wherein a transparent electrode layer of indium tin oxide is formed on a transparent film substrate by a sputtering method, and a crystallization step wherein the transparent electrode layer is crystallized. In the deposition step, a sputtering deposition is performed using a sputtering target containing indium oxide and tin oxide, while a sputtering gas containing argon and oxygen is introduced into a chamber. It is preferable that an effective exhaust rate S, calculated from a rate Q of the sputtering gas introduced into the chamber and a pressure P in the chamber by a formula S (L/second)=1.688×Q (sccm)/P (Pa), is 1,200-5,000 (L/second). It is also preferable that a resistivity of the transparent electrode layer is less than 3×10?4 ?cm.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: November 27, 2018
    Assignee: Kaneka Corporation
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Hiroaki Ueda
  • Publication number: 20180194105
    Abstract: A transparent electrode-equipped substrate includes a metal oxide transparent electrode layer on a transparent substrate. The average maximum curvature Ssc of the surface of the transparent electrode layer is preferably 5.4×10?4 nm?1 or less. For example, if the transparent electrode layer is subjected to a surface treatment by low discharge-power sputtering after deposition, the Ssc of the transparent electrode layer can be reduced. This transparent electrode-equipped substrate excels in close adhesion between the transparent electrode layer and a lead-out wiring line disposed on the transparent electrode layer. The transparent electrode layer is obtained by, for example, performing a transparent electrode deposition step of through the application of a first discharge power and then performing a surface treatment step through the application of a second discharge power.
    Type: Application
    Filed: March 18, 2016
    Publication date: July 12, 2018
    Inventors: Hironori HAYAKAWA, Shinya OMOTO, Takashi KUCHIYAMA
  • Publication number: 20180187300
    Abstract: A substrate with a transparent electrode which includes an amorphous transparent electrode layer on a transparent film substrate. When a bias voltage of 0.1 V is applied to the amorphous transparent electrode layer, the layer has continuous regions where a current value at a voltage-applied surface is 50 nA or more. Each of the continuous regions has an area of 100 nm2 or more and the number of the continuous regions is 50/?m2 or more. In one embodiment, the layer has a tin oxide content of 6.5% or more and 8% or less by mass. In another embodiment, the layer has a tin oxide content of 6.5% or more and 8% or less by mass. With respect to the substrate with a transparent electrode according to the present invention, the transparent electrode layer may be crystallized in a short period of time.
    Type: Application
    Filed: January 25, 2018
    Publication date: July 5, 2018
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Kenji Yamamoto
  • Publication number: 20180098422
    Abstract: A transparent conductive film is disclosed. It includes a transparent film base and a transparent electrode layer comprising a transparent conductive oxide layer and a patterned metal layer stacked in contact with each other. The maximum layer thickness of the transparent electrode layer is 300 nm. The metal layer has a metal pattern width of 1 ?m or more and 8 ?m or less, and the metal pattern coverage ratio of 0.4% or more and 3.2% or less. It is preferable that the metal layer has a layer thickness of 50 nm or more and 250 nm or less. It is also preferable that the pattern shape of the metal layer is of stripes, mesh, dots or the like.
    Type: Application
    Filed: April 1, 2016
    Publication date: April 5, 2018
    Applicant: KANEKA CORPORATION
    Inventors: Takashi Kuchiyama, Kenji Yamamoto
  • Patent number: 9903015
    Abstract: A substrate with a transparent electrode which includes an amorphous transparent electrode layer on a transparent film substrate. When a bias voltage of 0.1 V is applied to the amorphous transparent electrode layer, the layer has continuous regions where a current value at a voltage-applied surface is 50 nA or more. Each of the continuous regions has an area of 100 nm2 or more and the number of the continuous regions is 50/?m2 or more. In one embodiment, the layer has a tin oxide content of 6.5% or more and 8% or less by mass. In another embodiment, the layer has a tin oxide content of 6.5% or more and 8% or less by mass. With respect to the substrate with a transparent electrode according to the present invention, the transparent electrode layer may be crystallized in a short period of time.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: February 27, 2018
    Assignee: KANEKA CORPORATION
    Inventors: Hironori Hayakawa, Takashi Kuchiyama, Kenji Yamamoto
  • Patent number: 9657386
    Abstract: A transparent electroconductive film includes a transparent electrode layer on a transparent film substrate. The transparent electrode layer is formed of an amorphous indium tin composite oxide and has a tin oxide content of 3 to 12% by mass and a thickness of 15 to 30 nm. In an analysis range of the transparent electrode layer, a bond energy ESn of tin 3d5/2 and a bond energy EIn of indium 3d5/2 as determined by X-ray photoelectron spectroscopy measurement satisfy the following requirements: a minimum point of a bond energy difference between the bond energies ESn and EIn is present closer to the surface of the transparent electrode layer than a maximum point of the bond energy difference ESn?EIn; and a difference Emax?Emin between the maximum value Emax and the minimum value Emin of the bond energy difference is 0.1 eV or more.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: May 23, 2017
    Assignee: KANEKA CORPORATION
    Inventors: Hironori Hayakawa, Takashi Kuchiyama