Patents by Inventor Takashi Kurashina

Takashi Kurashina has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9590642
    Abstract: A circuit device includes a drive circuit that drives a physical quantity transducer, an FLL circuit that includes a frequency comparator and an oscillator, and generates a clock signal with a signal from the drive circuit as a reference clock signal, and a detection circuit that includes a circuit operated based on the clock signal, and performs detection processing on a detection signal from the physical quantity transducer.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: March 7, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Hideo Haneda, Takashi Kurashina, Katsuhiko Maki, Yasuhiro Sudo
  • Patent number: 9568315
    Abstract: A detection device includes a drive circuit of a physical quantity transducer, a synchronization signal output circuit, and a detection circuit that performs detection of a physical quantity signal based on a physical quantity. The synchronization signal output circuit includes a delay locked loop (DLL) circuit that includes: a delay control circuit that outputs a delay control signal and a delay circuit that includes a plurality of delay units in which a delay time is controlled by the delay control signal; an adjustment circuit that includes at least one delay unit in which a delay time is controlled by the delay control signal, and outputs a signal obtained by delaying an input signal based on the output signal from the drive circuit to the DLL circuit; and an output circuit that outputs the synchronization signal based on multi-phase clock signals from the DLL circuit.
    Type: Grant
    Filed: December 9, 2014
    Date of Patent: February 14, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Naoki Il, Katsuhiko Maki, Takashi Kurashina
  • Publication number: 20160294397
    Abstract: A circuit device includes a drive circuit that drives a physical quantity transducer, an FLL circuit that includes a frequency comparator and an oscillator, and generates a clock signal with a signal from the drive circuit as a reference clock signal, and a detection circuit that includes a circuit operated based on the clock signal, and performs detection processing on a detection signal from the physical quantity transducer.
    Type: Application
    Filed: March 28, 2016
    Publication date: October 6, 2016
    Inventors: Hideo HANEDA, Takashi KURASHINA, Katsuhiko MAKI, Yasuhiro SUDO
  • Publication number: 20160037693
    Abstract: A production management system is configured so as to make it possible to produce component mounting boards to the same specifications in two lanes of a component mounting machine using one set of NC data by arranging feeders of two feeder set bases in the same manner and setting the mounting order of the components to the circuit boards in the two lanes to be the same in a same-direction production mode in which circuit boards are conveyed in the same front/back direction in the two lanes. In addition, the arrangement of the feeders and the mounting order of the components are optimized so that the difference in production times in the two lanes in the same-direction production mode is minimized.
    Type: Application
    Filed: March 14, 2013
    Publication date: February 4, 2016
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Takashi KURASHINA, Hiroaki MURATSUCHI
  • Publication number: 20150382521
    Abstract: A component mounting system that efficiently determines a component as a bulk component to be mounted on a bulk feeder through a simulation, and a bulk component determining method. The component mounting system includes a printed-circuit-board conveyance section that includes conveyance lanes and which convey a plurality of different types of printed circuit boards, a component supply section, a mounting head, a bulk feeder, and a bulk component determining section that performs a simulation in which operation times when the components supplied from the component supply section are moved on the printed circuit boards on the conveyance lanes are calculated for all the components and determines the bulk component to be mounted on the bulk feeder based on the calculated operation times.
    Type: Application
    Filed: February 22, 2013
    Publication date: December 31, 2015
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Hiroaki MURATSUCHI, Takashi KURASHINA
  • Publication number: 20150206086
    Abstract: A production line management system that registers and manages distribution data for each of a plurality of production lines, and thus, manages work data in a unitary manner. The management system being constructed to manage production in a plurality of the production lines with a small amount of data and to simplify a system configuration. In particular, the distribution data is created by an identifier added to work data.
    Type: Application
    Filed: September 3, 2012
    Publication date: July 23, 2015
    Applicant: FUJI MACHINE MFG. CO., LTD.
    Inventors: Jun Kitayama, Takashi Kurashina
  • Publication number: 20150160012
    Abstract: A detection device includes a drive circuit of a physical quantity transducer, a synchronization signal output circuit, and a detection circuit that performs detection of a physical quantity signal based on a physical quantity. The synchronization signal output circuit includes a delay locked loop (DLL) circuit that includes: a delay control circuit that outputs a delay control signal and a delay circuit that includes a plurality of delay units in which a delay time is controlled by the delay control signal; an adjustment circuit that includes at least one delay unit in which a delay time is controlled by the delay control signal, and outputs a signal obtained by delaying an input signal based on the output signal from the drive circuit to the DLL circuit; and an output circuit that outputs the synchronization signal based on multi-phase clock signals from the DLL circuit.
    Type: Application
    Filed: December 9, 2014
    Publication date: June 11, 2015
    Inventors: Naoki II, Katsuhiko MAKI, Takashi KURASHINA
  • Publication number: 20140305185
    Abstract: A detection device includes a driving circuit and a detection circuit. The detection circuit includes first and second electric charge-voltage conversion circuits to which first and second detection signals are input, first and second gain adjustment amplifiers that amplify output signals of the circuits, a switching mixer that has first and second input nodes to which the output signals of the first and second gain adjustment amplifiers are input, and performs differential synchronous detection thereon on the basis of a synchronization signal from the driving circuit, so as to output first and second output signals to first and second output nodes, first and second filters that receive the first and second output signals from the first and second output nodes of the switching mixer, and an A/D conversion circuit that receives output signals from the first and second filters so as to perform differential A/D conversion thereon.
    Type: Application
    Filed: March 18, 2014
    Publication date: October 16, 2014
    Applicant: Seiko Epson Corporation
    Inventors: Katsuhiko Maki, Takashi Kurashina
  • Patent number: 7543259
    Abstract: A host computer 80 for wholly controlling an electronic component mounting line displays a surface side image and a reverse side image which respectively show a surface side and a reverse side of a board having components mounted thereon, with the images being superposed; displays components mounted on the surface side of the board and components mounted on the reverse side in visually different modes; and designates and determines the positions of support places of a backup device on the displayed superposed image (step 108).
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: June 2, 2009
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Teruyuki Oohashi, Takashi Kurashina
  • Publication number: 20070073428
    Abstract: A host computer 80 for wholly controlling an electronic component mounting line displays a surface side image and a reverse side image which respectively show a surface side and a reverse side of a board having components mounted thereon, with the images being superposed; displays components mounted on the surface side of the board and components mounted on the reverse side in visually different modes; and designates and determines the positions of support places of a backup device on the displayed superposed image (step 108).
    Type: Application
    Filed: May 13, 2004
    Publication date: March 29, 2007
    Applicant: Fuji Machine Mfg. Co., Ltd.
    Inventors: Teruyuki Oohashi, Takashi Kurashina