Abstract: A semiconductor lamination package includes a first package with a first semiconductor chip mounted thereon and a second package with a second semiconductor chip mounted thereon. The first package includes first mounting pads disposed on a bottom surface thereof for transmitting an input/output signal externally from the first semiconductor IC chip. The second package is laminated on the bottom surface of the first package. The second package includes a package substrate having first bonding pads disposed on one surface thereof and second mounting pads disposed on the other surface and electrically connected to the first bonding pads; a first wiring portion for electrically connecting the first bonding pads to a chip pad of the second semiconductor chip; and a package bonding substrate having connecting pads disposed on an upper surface of the second package and a wiring path for electrically connecting the connecting pads and the chip pad.

Abstract: A junction board cutting method includes, upon cutting a junction board formed by bonding a second main surface of a first substrate having a first main surface provided with chip areas and scribe areas demarcating the chip areas from one another and the second main surface, and a fourth main surface of a second substrate having a third main surface and the fourth main surface along the scribe areas and separating the same every chip, (1) a step for performing wet etching on areas given by orthogonal projection of the scribe areas to the third main surface to expose the second main surface, thereby defining concave groove, and (2) a step for performing dicing along the scribe areas until the exposed second main surface is reached, thereby to cut the junction board.

Abstract: A semiconductor device includes a lead frame. The lead frame has a chip mounting section and a plurality of leads. The chip mounting section has a base section, an insulation film covering the base section, a plurality of inter-connect sections, and a chip mounting area. The leads surround the chip mounting section. The semiconductor device also includes a first semiconductor chip having a plurality of first electrode pads. The semiconductor device also includes first bonding wires for connecting the first electrode pads to the inter-connect sections. The semiconductor device also includes a second semiconductor chip which has a cavity and a plurality of second electrode pads. The first semiconductor chip and the first bonding wires are received in the cavity. Second bonding wires connect the inter-connect sections exposed from the second semiconductor chip to the leads. Third bonding wires connect the second electrode pads to the leads. The semiconductor device also includes a sealing section.

Abstract: A junction board cutting method includes, upon cutting a junction board formed by bonding a second main surface of a first substrate having a first main surface provided with chip areas and scribe areas demarcating the chip areas from one another and the second main surface, and a fourth main surface of a second substrate having a third main surface and the fourth main surface along the scribe areas and separating the same every chip, (1) a step for performing wet etching on areas given by orthogonal projection of the scribe areas to the third main surface to expose the second main surface, thereby defining concave groove, and (2) a step for performing dicing along the scribe areas until the exposed second main surface is reached, thereby to cut the junction board.

Abstract: A semiconductor device includes a lead frame. The lead frame has a chip mounting section and a plurality of leads. The chip mounting section has a base section, an insulation film covering the base section, a plurality of inter-connect sections, and a chip mounting area. The leads surround the chip mounting section. The semiconductor device also includes a first semiconductor chip having a plurality of first electrode pads. The semiconductor device also includes first bonding wires for connecting the first electrode pads to the inter-connect sections. The semiconductor device also includes a second semiconductor chip which has a cavity and a plurality of second electrode pads. The first semiconductor chip and the first bonding wires are received in the cavity. Second bonding wires connect the inter-connect sections exposed from the second semiconductor chip to the leads. Third bonding wires connect the second electrode pads to the leads. The semiconductor device also includes a sealing section.