Abstract: Analogue to digital (A/D) and digital to analogue (D/A) converters perform the required conversion at a higher sampling rate (e.g. 64Fs) and a lower resolution (e.g. 1 to 4 bits) than the actual sampling rate (Fs) and resolution (e.g. 16 bits) of the required digital signal. The oversampled low resolution signal is generated by oversampling the input digital signal (for D/A conversion) or is decimated to generate the required output digital signal (for A/D conversion). The oversampling or decimation filters are switchable between two modes of operation, in which different signal delays are imposed by the filter. Thus a lower quality, but shorter delay, filter can be used in converters in the signal path for an artist's foldback signal. This can reduce the subjectively disturbing effects of long conversion delays in the foldback signal path.

Abstract: Data communications apparatus comprises a master device for processing digital audio data and a plurality of slave devices connectable in a ring network with the master device. Each slave device has a plurality of data channels associated therewith and is arranged for supply, in use, of audio data from the ring network to its associated data channels and/or to the ring network from its associated data channels. The master and slave devices are arranged for serial communication via the ring network in use of digital audio data formatted in frames, each frame comprising a plurality of data blocks which data blocks contain audio sample data corresponding to respective audio signals.

Abstract: A digital editing system includes first and second memories in which audio data and weighting factor data are respectively stored. The audio data are sequentially retrieved from the first memory and multiplied by corresponding weighting factor data retrieved from the second memory. A coincidence detector detects when predetermined storage locations of the memories are addressed. The weighting factor data has a unity or zero value during the time prior to the occurrence of an output from the detector, whereupon it changes its value as a function of time until it reaches to zero or unity and remains at the final value thereafter. The direction of variation of the weighting factor data can be appropriately selected to modify the audio data into a so-called "fade out" of "fade-in" pattern at a desired point of the audio program. A pair of such editing systems is required for editing audio programs from different sources for storing such programs in a pair of first memories.

Abstract: Prerecorded audio or video information signals including address data indicating the location of synchronized signals from a plurality of synchronized sources are supplied to a single separation circuit via a switching circuit. The separation circuit, selectively connected to one of the signal sources via the switching circuit, separates the address data from the audio or video information of the connected signal source. A register connected to the separation circuit receives the separated address data which constantly updates the register contents. At least one counter is reset to the contents of the register each time a newly selected signal source is connected to the separation circuit to load the address data of the previously connected signal source into that counter. At regular intervals one binary increment is added to the counter address data so that the counter count value corresponds to the address data of the previously connected signal source.

Abstract: A circuit arrangement of a digital filter comprises an A/D converter supplied with an input analog signal and producing as output a pulse-modulated digital signal, a digital filter for subjecting the digital signal from the A/D converter to a digital operation processing of finite word length, a D/A converter supplied with the resulting output digital signal of the digital filter and converting the same into an analog signal thereby to generate an output analog signal, an input detector for detecting the state wherein there is substantially no input analog signal and responsively producing as output a detection signal, an integrator for integrating the output of the D/A converter, a switching circuit for operating in response to the output detection signal of the input detector to pass the resulting output signal of the integrator, a reference voltage source, and an adder for adding the signal thus passed by the switching circuit and a reference voltage from the reference voltage source and feeding back and i