Patents by Inventor Takashi Miyajima
Takashi Miyajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240133414Abstract: A fastening member in an embodiment consists of a bolt and a nut. A hard layer made of a metal nitride is formed on a surface of a threaded portion of the bolt or a surface of a threaded portion of the nut.Type: ApplicationFiled: December 29, 2023Publication date: April 25, 2024Applicants: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATIONInventors: Shun OINUMA, Yasutaka KAWADA, Takashi MIURA, Hidekazu MIYAJIMA, Toru ABE, Kazuki KURODA
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Publication number: 20240017283Abstract: A transfer pin includes a main body portion, and a releasing portion formed on a tip end side of the main body portion, and configured to, when a solder paste including a solder ball is dipped and transferred to a mounting portion of a component of a board, release the solder paste from a tip end portion of the main body portion.Type: ApplicationFiled: December 17, 2020Publication date: January 18, 2024Applicant: FUJI CORPORATIONInventors: Jinya IMURA, Takashi MIYAJIMA
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Patent number: 9331138Abstract: A semiconductor device includes a first storage electrode, a second storage electrode that is arranged above the first storage electrode, a first landing pad that is arranged between a top surface of the first storage electrode and a bottom surface of the second storage electrode, the first landing pad connecting the first storage electrode and the second storage electrode, the first landing pad having a first landing surface, the first landing surface being larger than the bottom surface of the second storage electrode, and the second storage electrode being placed on the first landing surface, a capacitive insulating film that is laminated on the first and second storage electrodes and on an outer circumferential surface of the first landing pad, and a plate electrode that contacts the capacitive insulating film.Type: GrantFiled: April 29, 2014Date of Patent: May 3, 2016Assignee: PS4 LUXCO S.A.R.L.Inventor: Takashi Miyajima
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Publication number: 20140231959Abstract: A semiconductor device includes a first storage electrode, a second storage electrode that is arranged above the first storage electrode, a first landing pad that is arranged between a top surface of the first storage electrode and a bottom surface of the second storage electrode, the first landing pad connecting the first storage electrode and the second storage electrode, the first landing pad having a first landing surface, the first landing surface being larger than the bottom surface of the second storage electrode, and the second storage electrode being placed on the first landing surface, a capacitive insulating film that is laminated on the first and second storage electrodes and on an outer circumferential surface of the first landing pad, and a plate electrode that contacts the capacitive insulating film.Type: ApplicationFiled: April 29, 2014Publication date: August 21, 2014Applicant: Elpida Memory, Inc.Inventor: Takashi MIYAJIMA
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Patent number: 8723244Abstract: A semiconductor device includes a first storage electrode, a second storage electrode, a first landing pad, a capacitive insulating film, and a plate electrode. The second storage electrode is arranged above the first storage electrode. The first landing pad is arranged between a top surface of the first storage electrode and a bottom surface of the second storage electrode. The first landing pad connects the first storage electrode and the second storage electrode. The first landing pad has a first landing surface larger than the bottom surface of the second storage electrode. The second storage electrode is placed on the first landing surface. The capacitive insulating film is laminated on the first and second storage electrodes and on an outer circumferential surface of the first landing pad. The plate electrode contacts the capacitive insulating film.Type: GrantFiled: July 27, 2009Date of Patent: May 13, 2014Inventor: Takashi Miyajima
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Patent number: 8260376Abstract: An information processing apparatus includes an external fit frame having a concave part for battery pack storage, a card storage slot provided on a plane surface formed from one side wall of the external fit frame in an external direction for inserting and removing an IC card, and a wing shaped locking member supported on a back side of the plane surface for IC card locking, in which while the battery pack is mounted to the storage concave part, one end part of a wing part of the locking member abuts to be engaged in one end edge of the battery pack via a first opening part provided on the one side wall, and a locking protrusion formed at another end part of the locking member protrudes from a second opening part provided to the plane surface in a periphery of the one side wall to lock the IC card.Type: GrantFiled: September 22, 2008Date of Patent: September 4, 2012Assignee: Fujitsu Toshiba Mobile Communications LimitedInventors: Fumihiko Tanimoto, Takashi Miyajima
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Publication number: 20110042733Abstract: A semiconductor device includes a plurality of first electrodes standing over a substrate, and a supporter that supports the plurality of first electrodes in standing. The supporter includes a stack of first and second supporting films. The first supporting film has a compressive stress. The second supporting film has a tensile stress.Type: ApplicationFiled: August 17, 2010Publication date: February 24, 2011Applicant: ELPIDA MEMORY, INC.Inventors: Kazushi Komeda, Takashi Miyajima, Shigeru Sugioka, Takashi Miyamura
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Publication number: 20100176486Abstract: A semiconductor device includes a memory cell region and a peripheral circuit region. The memory cell region includes a first region and a second region surrounding the first region. The first region includes a plurality of first electrodes, a plurality of first support portions, and a second support portion. The plurality of first electrodes upwardly extends. The plurality of first support portions upwardly extends along the plurality of first electrodes. Each of the plurality of first support portions mechanically supports corresponding one of the plurality of first electrodes. The second support portion contacts with the plurality of the first support portions. The second support portion connects between each of the plurality of first electrodes.Type: ApplicationFiled: January 8, 2010Publication date: July 15, 2010Applicant: ELPIDA MEMORY, INC.Inventors: Takashi Miyajima, Shigeru Sugioka, Kazushi Komeda, Takashi Miyamura, Kohei Inoue
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Publication number: 20100052098Abstract: A semiconductor device includes a first storage electrode, a second storage electrode, a first landing pad, a capacitive insulating film, and a plate electrode. The second storage electrode is arranged above the first storage electrode. The first landing pad is arranged between a top surface of the first storage electrode and a bottom surface of the second storage electrode. The first landing pad connects the first storage electrode and the second storage electrode. The first landing pad has a first landing surface larger than the bottom surface of the second storage electrode. The second storage electrode is placed on the first landing surface. The capacitive insulating film is laminated on the first and second storage electrodes and on an outer circumferential surface of the first landing pad. The plate electrode contacts the capacitive insulating film.Type: ApplicationFiled: July 27, 2009Publication date: March 4, 2010Applicant: ELPIDA MEMORY, INC.Inventor: Takashi Miyajima
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Publication number: 20090124305Abstract: An information processing apparatus includes an external fit frame having a concave part for battery pack storage, a card storage slot provided on a plane surface formed from one side wall of the external fit frame in an external direction for inserting and removing an IC card, and a wing shaped locking member supported on a back side of the plane surface for IC card locking, in which while the battery pack is mounted to the storage concave part, one end part of a wing part of the locking member abuts to be engaged in one end edge of the battery pack via a first opening part provided on the one side wall, and a locking protrusion formed at another end part of the locking member protrudes from a second opening part provided to the plane surface in a periphery of the one side wall to lock the IC card.Type: ApplicationFiled: September 22, 2008Publication date: May 14, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Fumihiko TANIMOTO, Takashi MIYAJIMA
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Patent number: 7125260Abstract: A connector mounting structure on a circuit board is presented. A connector has a plurality of terminals comprising first terminals separated with a predetermined pitch and second terminals separated with a pitch larger than the predetermined pitch. The first and second terminals have respectively a first tail part facing toward the circuit board and a second tail part bent toward the circuit board after extending in the lateral direction from the connector housing. The first tail part is reflow-soldered to a land part formed on a surface of the circuit board, and the bent top end of the second tail part is inserted into a mounting hole penetrating another land part formed on the circuit board and reflow-soldered. In this mounting structure of the connector, it is simultaneously possible to narrow a pitch between terminals and to increase the peeling strength.Type: GrantFiled: October 20, 2005Date of Patent: October 24, 2006Assignees: Taiko Denki Co., Ltd., Sony CorporationInventors: Katsuyoshi Orita, Keiji Kawaguchi, Takashi Miyajima, Satoru Teruki
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Publication number: 20060089018Abstract: A connector mounting structure on a circuit board is presented. A connector has a plurality of terminals comprising a first terminal separated with a predetermined pitch and a second terminal separated with a pitch larger than the predetermined pitch. The first and second terminals have respectively a first tail part facing toward the circuit board and a second tail part bent on the circuit board side after extended in the lateral direction of the connector housing. The first tail part is reflow-soldered to a land part formed on the surface of the circuit board, and the bent top end of the second tail part is inserted into a mounting hole penetrating the other land part formed on the circuit board and reflow-soldered. In this mounting structure of the connector, it is simultaneously possible to narrow a pitch between terminals and to increase the peeling strength.Type: ApplicationFiled: October 20, 2005Publication date: April 27, 2006Applicants: Sony Corporation, Taiko Denki Co., Ltd.Inventors: Katsuyoshi Orita, Keiji Kawaguchi, Takashi Miyajima, Satoru Teruki
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Publication number: 20060069923Abstract: An authentication system comprises a plurality of authentication devices connected one another via a communication line. A user inputs biological information in the first authentication device. The input biological information is registered in the first authentication device and also is transmitted to the authentication devices from the first authentication device. The transmitted biological information is respectively registered in each of the authentication devices. Upon conducting identity verification of a user, each of the authentication devices checks the biological information newly input by the user with the biological information registered in the authentication device.Type: ApplicationFiled: March 24, 2005Publication date: March 30, 2006Applicant: FUJITSU LIMITEDInventors: Kimikazu Ito, Akira Wakabayashi, Takashi Miyajima
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Patent number: 6949786Abstract: A semiconductor device is obtained that can prevent occurrence of a shape defect of a capacitor electrode in the semiconductor device or operation failure of the semiconductor device. A semiconductor device with the capacitor includes a second interlayer insulation film, an SC poly plug, a barrier metal and an SN electrode. The second interlayer insulation film has a through hole. The SC poly plug is formed within the through hole of the second interlayer insulation film. The barrier metal is formed on the SC poly plug. The SN electrode is formed on the barrier metal. The SN electrode is electrically connected to the SC poly plug with the barrier metal interposed therebetween. The barrier metal is a multilayer film including three layers of a tantalum nitride (TaN) film, a titanium nitride (TiN) film and a titanium (Ti) film.Type: GrantFiled: February 21, 2003Date of Patent: September 27, 2005Assignee: Renesas Technology Corp.Inventor: Takashi Miyajima
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Publication number: 20050009346Abstract: Wet etching is performed on a storage electrode (7) made of ruthenium from above using periodic acid or a cerium ammonium nitrate solution. By using that kind of etching liquid, ruthenium as well as oxide films formed on the surface of the storage electrode (7) can be etched, causing the surface of the storage electrode (7) to be entirely etched. As a result, needle projections having been formed on the top surface of the storage electrode (7) are removed, rounding the top ends of the storage electrode (7). Consequently, the thickness of a dielectric film of a DRAM capacitor to be formed on the storage electrode (7) can be easily made uniform, allowing a reduction in leakage current of the capacitor.Type: ApplicationFiled: December 1, 2003Publication date: January 13, 2005Applicant: Renesas Technology Corp.Inventor: Takashi Miyajima
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Publication number: 20040219748Abstract: A method of manufacturing a semiconductor device is provided. A polysilicon film and a rough-surfaced polysilicon film are formed on inter-layer insulating film including side and bottom surfaces of openings formed in inter-layer insulating film. A photoresist is formed on the rough-surfaced polysilicon film. The photoresist, the rough-surfaced polysilicon film and the polysilicon film that are located on the top surface of inter-layer insulating film are removed by the CMP method. The polysilicon film and rough-surfaced polysilicon film are etched in a predetermined atmosphere to make the position of the top end of storage nodes lower than the top surface of inter-layer insulating film.Type: ApplicationFiled: May 27, 2004Publication date: November 4, 2004Applicant: RENESAS TECHNOLOGY CORP.Inventors: Masahiro Shimizu, Takashi Miyajima, Toshinori Morihara
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Patent number: 6768154Abstract: There is provided a semiconductor device having a storage node free of defect in geometry and capable of preventing a cylinder from collapsing, protecting an interface with an SC's polycrystalline silicon barrier metal against oxidation, and furthermore reducing current leakage. The device includes a storage node contact insulation film disposed on a semiconductor substrate and provided with a storage node, a storage node insulation film and the storage node penetrating the storage node insulation film and positioned to extend from the storage node insulation film upward, and a storage node contact is recessed toward a bottom of the storage node and the storage node's bottom has a protruding geometry embedded in the recess.Type: GrantFiled: April 8, 2003Date of Patent: July 27, 2004Assignee: Renesas Technology Corp.Inventor: Takashi Miyajima
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Patent number: 6756267Abstract: A method of manufacturing a semiconductor device is provided. A polysilicon film and a rough-surfaced polysilicon film are formed on inter-layer insulating film including side and bottom surfaces of openings formed in inter-layer insulating film. A photoresist is formed on the rough-surfaced polysilicon film. The photoresist, the rough-surfaced polysilicon film and the polysilicon film that are located on the top surface of inter-layer insulating film are removed by the CMP method. The polysilicon film and rough-surfaced polysilicon film are etched in a predetermined atmosphere to make the position of the top end of storage nodes lower than the top surface of inter-layer insulating film.Type: GrantFiled: November 25, 2002Date of Patent: June 29, 2004Assignee: Renesas Technology, Inc.Inventors: Masahiro Shimizu, Takashi Miyajima, Toshinori Morihara
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Patent number: 6717824Abstract: A rectangular frame-like auxiliary substrate for hierarchical mounting 14 is mounted so as to surround a semiconductor component 15 mounted on a printed wiring board 11, and another semiconductor component 16 is mounted above the semiconductor component 15, being supported on the auxiliary substrate for hierarchical mounting 14 with terminals of the semiconductor component 16 being connected thereto. The auxiliary substrate for hierarchical mounting 14 has wiring patterns 35a and through holes 34a, and includes a power supply layer 32 and a ground layer 33 inside thereof with printed wiring board pads on a lower surface of the auxiliary substrate for hierarchical mounting 14 being more dispersed than component pads 23a on an upper surface of the auxiliary substrate for hierarchical mounting 14.Type: GrantFiled: November 30, 2001Date of Patent: April 6, 2004Assignee: Fujitsu LimitedInventors: Takashi Miyajima, Sachiko Sano
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Publication number: 20040051131Abstract: A semiconductor device is obtained that can prevent occurrence of a shape defect of a capacitor electrode in the semiconductor device or operation failure of the semiconductor device. A semiconductor device with the capacitor includes a second interlayer insulation film, an SC poly plug, a barrier metal and an SN electrode. The second interlayer insulation film has a through hole. The SC poly plug is formed within the through hole of the second interlayer insulation film. The barrier metal is formed on the SC poly plug. The SN electrode is formed on the barrier metal. The SN electrode is electrically connected to the SC poly plug with the barrier metal interposed therebetween. The barrier metal is a multilayer film including three layers of a tantalum nitride (TaN) film, a titanium nitride (TiN) film and a titanium (Ti) film.Type: ApplicationFiled: February 21, 2003Publication date: March 18, 2004Applicant: Mitsubishi Denki Kabushiki KaishaInventor: Takashi Miyajima